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参数资料
型号： P89V52X2FBD,157
厂商： NXP Semiconductors
文件页数： 45/57页
文件大小： 0K
描述： IC 80C51 MCU FLASH 8K 44-LQFP
产品培训模块： Migrating from 8/16-Bit MCUs to 32-Bit ARMs
标准包装： 800
系列： 89V
核心处理器： 8051
芯体尺寸： 8-位
速度： 40MHz
连通性： UART/USART
外围设备： POR
输入/输出数： 32
程序存储器容量： 8KB（8K x 8）
程序存储器类型： 闪存
EEPROM 大小： 192 x 8
RAM 容量： 256 x 8
电压 - 电源 (Vcc/Vdd)： 2.7 V ~ 5.5 V
振荡器型： 外部
工作温度： -40°C ~ 85°C
封装/外壳： 44-LQFP
包装： 托盘
配用： 622-1017-ND - BOARD 44-ZIF PLCC SOCKET
622-1012-ND - BOARD FOR P89V52X2 44-TQFP
622-1008-ND - BOARD FOR LPC9103 10-HVSON
其它名称： 568-4250
935282529157
P89V52X2FBD
P89V52X2_3
NXP B.V. 2009. All rights reserved.
Product data sheet
Rev. 03 — 4 May 2009
5 of 57
NXP Semiconductors
P89V52X2
80C51 with 256 B RAM, 192 B data EEPROM
5.2 Pin description
Table 2.
Pin description
Symbol
Pin
Type
Description
DIP40
LQFP44
PLCC44
P0[0] to P0[7]
I/O
Port 0: Port 0 is an 8-bit open-drain bidirectional I/O port.
Port 0 pins that have ‘1’s written to them oat, and in this
state can be used as high-impedance inputs. Port 0 is also
the multiplexed low-order address and data bus during
accesses to external code and data memory. In this
application, it uses strong internal pull-ups when
transitioning to ‘1’s. External pull-ups are required as a
general purpose I/O port.
P0[0]/AD0
39
37
43
I/O
P0[0] — Port 0 bit 0.
I/O
AD0 — Address/data bit 0.
P0[1]/AD1
38
36
42
I/O
P0[1] — Port 0 bit 1.
I/O
AD1 — Address/data bit 1.
P0[2]/AD2
37
35
41
I/O
P0[2] — Port 0 bit 2.
I/O
AD2 — Address/data bit 2.
P0[3]/AD3
36
34
40
I/O
P0[3] — Port 0 bit 3.
I/O
AD3 — Address/data bit 3.
P0[4]/AD4
35
33
39
I/O
P0[4] — Port 0 bit 4.
I/O
AD4 — Address/data bit 4.
P0[5]/AD5
34
32
38
I/O
P0[5] — Port 0 bit 5.
I/O
AD5 — Address/data bit 5.
P0[6]/AD6
33
31
37
I/O
P0[6] — Port 0 bit 6.
I/O
AD6 — Address/data bit 6.
P0[7]/AD7
32
30
36
I/O
P0[7] — Port 0 bit 7.
I/O
AD7 — Address/data bit 7.
P1[0] to P1[7]
I/O with
internal
pull-up
Port 1: Port 1 is an 8-bit bidirectional I/O port with internal
pull-ups. The Port 1 pins are pulled HIGH by the internal
pull-ups when ‘1’s are written to them and can be used as
inputs in this state. As inputs, Port 1 pins that are
externally pulled LOW will source current (IIL) because of
the internal pull-ups. P1[5], P1[6], P1[7] have high current
drive of 16 mA.
P1[0]/T2
1
40
2
I/O
P1[0] — Port 1 bit 0.
I
T2 — External count input to Timer/Counter 2 or Clock-out
from Timer/Counter 2
P1[1]/T2EX
2
41
3
I/O
P1[1] — Port 1 bit 1.
I
T2EX: Timer/Counter 2 capture/reload trigger and
direction control
P1[2]
3
42
4
I/O
P1[2] — Port 1 bit 2.
P1[3]
4
43
5
I/O
P1[3] — Port 1 bit 3.
P1[4]
5
44
6
I/O
P1[4] — Port 1 bit 4.
P1[5]
6
1
7
I/O
P1[5] — Port 1 bit 5.
P1[6]
7
2
8
I/O
P1[6] — Port 1 bit 6.
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