参数资料
型号: PGA117AIPW
厂商: TEXAS INSTRUMENTS INC
元件分类: 模拟信号调理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO20
封装: GREEN, PLASTIC, TSSOP-20
文件页数: 15/47页
文件大小: 1545K
代理商: PGA117AIPW
SCLK
DOUT1
DIN2
t
RFI
t
SU
t
MIN
=55ns
SCLK
MAX
=9.09MHz
t
MIN
=55ns
t
DO
t
RFI
10ns
25ns
10ns
SBOS424B – MARCH 2008 – REVISED SEPTEMBER 2008 ............................................................................................................................................ www.ti.com
The maximum SCLK frequency that can be used in
daisy-chain operation is directly related to SCLK
rise/fall
times,
DIN
setup
time,
and
DOUT
propagation delay. Any number of two or more
devices have the same limitations because it is the
timing considerations between adjacent devices that
limit the clock speed.
Figure 63 analyzes the maximum SCLK frequency for
daisy-chain mode based on the circuit of Figure 61. A
clock rise and fall time of 10ns is assumed to allow
for extra bus capacitance that could occur as a result
of multiple devices in the daisy-chain.
Figure 63. Daisy-Chain Maximum SCLK
Frequency
22
Copyright 2008, Texas Instruments Incorporated
Product Folder Link(s): PGA112 PGA113 PGA116 PGA117
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