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参数资料
| 型号： | PIC12F1840T-I/MF |
| 厂商： | Microchip Technology |
| 文件页数： | 33/122页 |
| 文件大小： | 0K |
| 描述： | MCU 7KB FLASH 256B RAM XLP 8DFN |
| 标准包装： | 3,300 |
| 系列： | PIC® XLP™ 12F |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 32MHz |
| 连通性： | I²C，LIN，SPI，UART/USART |
| 外围设备： | 欠压检测/复位，POR，PWM，WDT |
| 输入/输出数： | 5 |
| 程序存储器容量： | 7KB（4K x 14） |
| 程序存储器类型： | 闪存 |
| EEPROM 大小： | 256 x 8 |
| RAM 容量： | 256 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 2.3 V ~ 5.5 V |
| 数据转换器： | A/D 4x10b |
| 振荡器型： | 内部 |
| 工作温度： | -40°C ~ 85°C |
| 封装/外壳： | 8-VDFN 裸露焊盘 |
| 包装： | 带卷 (TR) |
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PIC12(L)F1840
DS41441B-page 18
Preliminary
2011 Microchip Technology Inc.
3.2.1.1
STATUS Register
The STATUS register, shown in Register 3-1, contains:
the arithmetic status of the ALU
the Reset status
The STATUS register can be the destination for any
instruction, like any other register. If the STATUS
register is the destination for an instruction that affects
the Z, DC or C bits, then the write to these three bits is
disabled. These bits are set or cleared according to the
device logic. Furthermore, the TO and PD bits are not
writable. Therefore, the result of an instruction with the
STATUS register as destination may be different than
intended.
For example, CLRF STATUS will clear the upper three
bits and set the Z bit. This leaves the STATUS register
as ‘000u u1uu’ (where u = unchanged).
It is recommended, therefore, that only BCF, BSF,
SWAPF
and MOVWF instructions are used to alter the
STATUS register, because these instructions do not
affect any Status bits. For other instructions not
affecting any Status bits (Refer to Section 29.0
).
Note 1:
The C and DC bits operate as Borrow
and Digit Borrow out bits, respectively, in
subtraction.
REGISTER 3-1:
STATUS: STATUS REGISTER
U-0
R-1/q
R/W-0/u
—
TO
PD
ZDC(1)
C(1)
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
u = Bit is unchanged
x = Bit is unknown
-n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set
‘0’ = Bit is cleared
q = Value depends on condition
bit 7-5
Unimplemented:
Read as ‘0’
bit 4
TO:
Time-out bit
1
= After power-up, CLRWDT instruction or SLEEP instruction
0
= A WDT time-out occurred
bit 3
PD:
Power-down bit
1
= After power-up or by the CLRWDT instruction
0
= By execution of the SLEEP instruction
bit 2
Z:
Zero bit
1
= The result of an arithmetic or logic operation is zero
0
= The result of an arithmetic or logic operation is not zero
bit 1
DC:
Digit Carry/Digit Borrow bit(1)
1
= A carry-out from the 4th low-order bit of the result occurred
0
= No carry-out from the 4th low-order bit of the result
bit 0
C:
Carry/Borrow bit(1)
1
= A carry-out from the Most Significant bit of the result occurred
0
= No carry-out from the Most Significant bit of the result occurred
Note 1:
For Borrow, the polarity is reversed. A subtraction is executed by adding the two’s complement of the
second operand.
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