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参数资料
型号： PIC16LC642-04/SP
厂商： Microchip Technology
文件页数： 43/125页
文件大小： 0K
描述： IC MCU OTP 4KX14 COMP 28DIP
产品培训模块： Asynchronous Stimulus
标准包装： 15
系列： PIC® 16C
核心处理器： PIC
芯体尺寸： 8-位
速度： 4MHz
外围设备： 欠压检测/复位，LED，POR，WDT
输入/输出数： 22
程序存储器容量： 7KB（4K x 14）
程序存储器类型： OTP
RAM 容量： 176 x 8
电压 - 电源 (Vcc/Vdd)： 3 V ~ 6 V
振荡器型： 外部
工作温度： 0°C ~ 70°C
封装/外壳： 28-DIP（0.300"，7.62mm）
包装： 管件
Micrel, Inc.
KSZ8862-16/32MQL
April 2007
24
M9999-040407-3.0
The 100BASE-FX signal detection is summarized as below:
When FXSD1 input voltage is less than 0.2V, this is not a fiber mode or there is no fiber connection.
When FXSD1 input voltage is greater than 1.0V but less than 1.8V, this is a FX mode but no signal detected and far-end
fault generated.
When FXSD1 input voltage is greater than 2.2V, this is a FX mode with signal detected.
To ensure proper operation, a resistive voltage divider is recommended to adjust the fiber transceiver SD output voltage
swing to match the FXSD1 pin’s input voltage threshold.
100BASE-FX Far-End-Fault (FEF)
A far-end-fault (FEF) occurs when the signal detection is logically false on the receive side of the fiber transceiver. The
KSZ8862M detects a FEF when its FXSD1 input on port 1 is between 1V and 1.8V. When a FEF is detected, the
KSZ8862M signals its fiber link partner that a FEF has occurred by sending 84 1’s followed by a zero in the idle period
between frames.
By default, FEF is enabled. FEF can be disabled through register setting at P1MBCR (bit2) or P1CR4 (bit12).
100BASE-SX Operation
100BASE-SX operation is supported on port 1 only. It conforms to the TIA/EIA-785 Standard for 100BASE-SX fiber
operation. Fiber Link Negotiation Pulse (FLNP) Bursts are used to advertise link capabilities to the link partner during fiber
auto-negotiation. FLNP Bursts are equivalent to the Fast Link Pulse (FLP) Bursts used in 10BASE-T and 100BASE-TX
auto-negotiation defined by clause 28 of the IEEE802.3 Standard. Refer to respective Standard for details.
Physical Interface
For 100BASE-SX operation, port 1 interfaces with an external fiber module to drive 850nm fiber optic links up to a
maximum distance of 300m. The interface connections between the KSZ8862M and fiber module are single-ended
(common mode). 100BASE-SX signal transmission and reception are done on TXM1 (pin 49) and RXM1 (pin 46),
respectively. Refer to Micrel reference schematic for recommended interface circuit and termination.
Enabling 100BASE-SX Mode
To enable 100BASE-SX mode, tie FXSD1 (pin 44) to high (+3.3V) and 100FX/10FL (pin 41)-to-ground.
Enabling Fiber Forced Mode
In 100BASE-SX mode, the KSZ8862M supports forced mode only.
For forced mode, port 1 has auto-negotiation disabled, is forced to 100Mbps for the speed, and is set to either half or full
duplex. Optionally, flow control can be enabled to send out PAUSE frames in full duplex mode.
Forced mode and auto-negotiation disabled mode settings for 100BASE-SX fiber use the same registers (P1MBCR,
P1CR4). These registers are summarized in the Register Map section.
10BASE-FL Operation
10BASE-FL operation is supported on port 1 only. It conforms to clause 15 and 18 of the IEEE802.3 Standard for
10BASE-FL fiber operation. Fiber Link Negotiation Pulse (FLNP) Bursts are used to advertise link capabilities to the link
partner during fiber auto-negotiation. FLNP Bursts are equivalent to the Fast Link Pulse (FLP) Bursts used in 10BASE-T
and 100BASE-TX auto-negotiation defined by clause 28 of the IEEE802.3 Standard. Refer to respective Standard for
details.
Physical Interface
For 10BASE-FL operation, port 1 interfaces with an external fiber module to drive 850nm fiber optic links up to a
maximum distance of 2km. The interface connections between the KSZ8862M and fiber module are single-ended
(common mode). 10BASE-FL signal transmission and reception are done on TXM1 (pin 49) and RXM1 (pin 46),
respectively. Refer to Micrel reference schematic for recommended interface circuit and termination.
Enabling 10BASE-FL Mode
To enable 10BASE-FL mode, tie FXSD1 (pin 44) to high (+3.3V) and 100FX/10FL (pin 41)-to-ground.
Enabling Fiber Forced Mode
In 10BASE-FL mode, the KSZ8862M supports forced mode only.
For forced mode, port 1 has auto-negotiation disabled, is forced to 10Mbps for the speed, and is set to either half or full
duplex. Optionally, flow control can be enabled to send out PAUSE frames in full duplex mode.
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PIC16LC64A-04/L 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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PIC16LC64A-04/PQ 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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