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| 型号： | PIC16LC642-04/SP |
| 厂商： | Microchip Technology |
| 文件页数： | 93/125页 |
| 文件大小： | 0K |
| 描述： | IC MCU OTP 4KX14 COMP 28DIP |
| 产品培训模块： | Asynchronous Stimulus |
| 标准包装： | 15 |
| 系列： | PIC® 16C |
| 核心处理器： | PIC |
| 芯体尺寸： | 8-位 |
| 速度： | 4MHz |
| 外围设备： | 欠压检测/复位，LED，POR，WDT |
| 输入/输出数： | 22 |
| 程序存储器容量： | 7KB（4K x 14） |
| 程序存储器类型： | OTP |
| RAM 容量： | 176 x 8 |
| 电压 - 电源 (Vcc/Vdd)： | 3 V ~ 6 V |
| 振荡器型： | 外部 |
| 工作温度： | 0°C ~ 70°C |
| 封装/外壳： | 28-DIP（0.300"，7.62mm） |
| 包装： | 管件 |
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Micrel, Inc.
KSZ8862-16/32MQL
April 2007
7
M9999-040407-3.0
Bank 45 PHY 1 MII-Register Basic Status Register (0x02): P1MBSR...........................................................................82
Bank 45 PHY 1 PHYID Low Register (0x04): PHY1ILR.................................................................................................82
Bank 45 PHY 1 PHYID High Register (0x06): PHY1IHR ...............................................................................................82
Bank 45 PHY 1 Auto-Negotiation Advertisement Register (0x08): P1ANAR.................................................................83
Bank 45 PHY 1 Auto-Negotiation Link Partner Ability Register (0x0A): P1ANLPR .......................................................83
Bank 46 PHY 2 MII-Register Basic Control Register (0x00): P2MBCR .........................................................................84
Bank 46 PHY 2 MII-Register Basic Status Register (0x02): P2MBSR...........................................................................85
Bank 46 PHY 2 PHYID Low Register (0x04): PHY2ILR.................................................................................................85
Bank 46 PHY 2 PHYID High Register (0x06): PHY2IHR ...............................................................................................85
Bank 46 PHY 2 Auto-Negotiation Advertisement Register (0x08): P2ANAR.................................................................86
Bank 46 PHY 2 Auto-Negotiation Link Partner Ability Register (0x0A): P2ANLPR .......................................................86
Bank 47 PHY1 Special Control/Status Register (0x02): P1PHYCTRL ..........................................................................87
Bank 47 PHY2 LinkMD
Control/Status (0x04): P2VCT ................................................................................................87
Bank 47 PHY2 Special Control/Status Register (0x06): P2PHYCTRL ..........................................................................88
Bank 48 Port 1 Control Register 1 (0x00): P1CR1 .........................................................................................................88
Bank 48 Port 1 Control Register 2 (0x02): P1CR2 .........................................................................................................89
Bank 48 Port 1 VID Control Register (0x04): P1VIDCR.................................................................................................90
Bank 48 Port 1 Control Register 3 (0x06): P1CR3 .........................................................................................................90
Bank 48 Port 1 Ingress Rate Control Register (0x08): P1IRCR.....................................................................................91
Bank 48 Port 1 Egress Rate Control Register (0x0A): P1ERCR....................................................................................93
Bank 49 Port 1 PHY Special Control/Status, LinkMD
(0x00): P1SCSLMD..................................................................95
Bank 49 Port 1 Control Register 4 (0x02): P1CR4 .........................................................................................................95
Bank 49 Port 1 Status Register (0x04): P1SR................................................................................................................96
Bank 50 Port 2 Control Register 1 (0x00): P2CR1 .........................................................................................................97
Bank 50 Port 2 Control Register 2 (0x02): P2CR2 .........................................................................................................97
Bank 50 Port 2 VID Control Register (0x04): P2VIDCR.................................................................................................97
Bank 50 Port 2 Control Register 3 (0x06): P2CR3 .........................................................................................................97
Bank 50 Port 2 Ingress Rate Control Register (0x08): P2IRCR.....................................................................................97
Bank 50 Port 2 Egress Rate Control Register (0x0A): P2ERCR....................................................................................97
Bank 51 Port 2 PHY Special Control/Status, LinkMD
(0x00): P2SCSLMD..................................................................98
Bank 51 Port 2 Control Register 4 (0x02): P2CR4 .........................................................................................................99
Bank 51 Port 2 Status Register (0x04): P2SR..............................................................................................................100
Bank 52 Host Port Control Register 1 (0x00): P3CR1 .................................................................................................101
Bank 52 Host Port Control Register 2 (0x02): P3CR2 .................................................................................................101
Bank 52 Host Port VID Control Register (0x04): P3VIDCR .........................................................................................102
Bank 52 Host Port Control Register 3 (0x06): P3CR3 .................................................................................................102
Bank 52 Host Port Ingress Rate Control Register (0x08): P3IRCR .............................................................................102
Bank 52 Host Port Egress Rate Control Register (0x0A): P3ERCR ............................................................................102
Banks 53 – 63: Reserved .............................................................................................................................................102
MIB (Management Information Base) Counters...........................................................................................................103
Format of “All Ports Dropped Packet” MIB Counters ...................................................................................................104
Additional MIB Information............................................................................................................................................105
Static MAC Address Table .............................................................................................................................................106
Static MAC Table Lookup Examples: ...........................................................................................................................106
Dynamic MAC Address Table ........................................................................................................................................107
Dynamic MAC Address Lookup Example:....................................................................................................................107
VLAN Table ......................................................................................................................................................................108
VLAN Table Lookup Examples:....................................................................................................................................108
Absolute Maximum Ratings
(1) ........................................................................................................................................109
Operating Ratings
(1) ........................................................................................................................................................109
Electrical Characteristics
(1) ............................................................................................................................................110
Timing Specifications .....................................................................................................................................................111
Asynchronous Timing without using Address Strobe (ADSN = 0) ...............................................................................111
Asynchronous Timing Using Address Strobe (ADSN) .................................................................................................112
Asynchronous Timing Using DATACSN.......................................................................................................................113
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| PIC16LC642T-04/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16LC642T-04I/SO | 功能描述:8位微控制器 -MCU 7KB 176 RAM 22 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16LC64A-04/L | 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16LC64A-04/P | 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
| PIC16LC64A-04/PQ | 功能描述:8位微控制器 -MCU 3.5KB 128 RAM 33 I/O RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT |
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