参数资料
型号: PIC16LF72T-I/ML
厂商: Microchip Technology
文件页数: 123/136页
文件大小: 0K
描述: IC MCU FLASH 2KX14 LV AD 28-QFN
产品培训模块: Asynchronous Stimulus
标准包装: 1,600
系列: PIC® 16F
核心处理器: PIC
芯体尺寸: 8-位
速度: 20MHz
连通性: I²C,SPI
外围设备: 欠压检测/复位,POR,PWM,WDT
输入/输出数: 22
程序存储器容量: 3.5KB(2K x 14)
程序存储器类型: 闪存
RAM 容量: 128 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 5x8b
振荡器型: 外部
工作温度: -40°C ~ 85°C
封装/外壳: 28-VQFN 裸露焊盘
包装: 带卷 (TR)
87
2535J–AVR–08/10
ATtiny13
14.6.2
ADC Voltage Reference
The reference voltage for the ADC (VREF) indicates the conversion range for the ADC. Single
ended channels that exceed VREF will result in codes close to 0x3FF. VREF can be selected as
either VCC, or internal 1.1V reference. The first ADC conversion result after switching reference
voltage source may be inaccurate, and the user is advised to discard this result.
14.7 ADC Noise Canceler
The ADC features a noise canceler that enables conversion during sleep mode to reduce noise
induced from the CPU core and other I/O peripherals. The noise canceler can be used with ADC
Noise Reduction and Idle mode. To make use of this feature, the following procedure should be
used:
Make sure that the ADC is enabled and is not busy converting. Single Conversion mode must
be selected and the ADC conversion complete interrupt must be enabled.
Enter ADC Noise Reduction mode (or Idle mode). The ADC will start a conversion once the
CPU has been halted.
If no other interrupts occur before the ADC conversion completes, the ADC interrupt will
wake up the CPU and execute the ADC Conversion Complete interrupt routine. If another
interrupt wakes up the CPU before the ADC conversion is complete, the interrupt will be
executed, and an ADC Conversion Complete interrupt request will be generated when the
ADC conversion completes. The CPU will remain in active mode until a new sleep command
is executed.
Note that the ADC will not be automatically turned off when entering other sleep modes than Idle
mode and ADC Noise Reduction mode. The user is advised to write zero to ADEN before enter-
ing such sleep modes to avoid excessive power consumption.
14.8 Analog Input Circuitry
The analog input circuitry for single ended channels is shown in Figure 14-8 An analog source
applied to ADCn is subjected to pin capacitance and input leakage of that pin, regardless if the
channel is chosen as input for the ADC, or not. When the channel is selected, the source drives
the S/H capacitor through the series resistance (combined resistance in input path).
Figure 14-8. Analog Input Circuitry
Note:
The capacitor in the figure depicts the total capacitance, including the sample/hold capacitor and
any stray or parasitic capacitance inside the device. The value given is worst case.
n
IIH
1..100 k
ohm
CS/H= 14 pF
IIL
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