参数资料
型号: PIC18LF2450T-I/SO
厂商: Microchip Technology
文件页数: 116/143页
文件大小: 0K
描述: IC PIC MCU FLASH 8KX16 28SOIC
标准包装: 1,600
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 48MHz
连通性: UART/USART,USB
外围设备: 欠压检测/复位,HLVD,POR,PWM,WDT
输入/输出数: 23
程序存储器容量: 16KB(8K x 16)
程序存储器类型: 闪存
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 10x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
PIC18F2450/4450
DS39760A-page 72
Advance Information
2006 Microchip Technology Inc.
5.6.3
MAPPING THE ACCESS BANK IN
INDEXED LITERAL OFFSET MODE
The use of Indexed Literal Offset Addressing mode
effectively changes how the lower portion of Access
RAM (00h to 5Fh) is mapped. Rather than containing
just the contents of the bottom half of Bank 0, this mode
maps the contents from Bank 0 and a user-defined
“window” that can be located anywhere in the data
memory space. The value of FSR2 establishes the
lower boundary of the addresses mapped into the
window, while the upper boundary is defined by FSR2
plus 95 (5Fh). Addresses in the Access RAM above
5Fh are mapped as previously described (see
Section 5.3.3 “Access Bank”). An example of Access
Bank remapping in this addressing mode is shown in
Remapping of the Access Bank applies
only to
operations using the Indexed Literal Offset mode.
Operations that use the BSR (Access RAM bit is ‘1’) will
continue to use Direct Addressing as before. Any
indirect or indexed operation that explicitly uses any of
the indirect file operands (including FSR2) will continue
to operate as standard Indirect Addressing. Any
instruction that uses the Access Bank, but includes a
register address of greater than 05Fh, will use Direct
Addressing and the normal Access Bank map.
5.6.4
BSR IN INDEXED LITERAL
OFFSET MODE
Although the Access Bank is remapped when the
extended instruction set is enabled, the operation of the
BSR remains unchanged. Direct Addressing, using the
BSR to select the data memory bank, operates in the
same manner as previously described.
FIGURE 5-9:
REMAPPING THE ACCESS BANK WITH INDEXED LITERAL
OFFSET ADDRESSING
Data Memory
000h
100h
200h
F60h
F00h
FFFh
Bank 1
Bank 15
Bank 2
through
Bank 14
SFRs
ADDWF f, d, a
FSR2H:FSR2L = 120h
Locations in the region
from the FSR2 Pointer
(120h) to the pointer plus
05Fh (17Fh) are mapped
to
the
bottom
of
the
Access RAM (000h-05Fh).
Special Function Regis-
ters at F60h through FFFh
are
mapped
to
60h
through FFh as usual.
Bank 0 addresses below
5Fh are not available in
this mode. They can still
be addressed by using the
BSR.
Access Bank
00h
60h
FFh
Bank 0
SFRs
Bank 1 “Window”
Window
Example Situation:
120h
17Fh
5Fh
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