参数资料
型号: PIC18LF2450T-I/SO
厂商: Microchip Technology
文件页数: 36/143页
文件大小: 0K
描述: IC PIC MCU FLASH 8KX16 28SOIC
标准包装: 1,600
系列: PIC® 18F
核心处理器: PIC
芯体尺寸: 8-位
速度: 48MHz
连通性: UART/USART,USB
外围设备: 欠压检测/复位,HLVD,POR,PWM,WDT
输入/输出数: 23
程序存储器容量: 16KB(8K x 16)
程序存储器类型: 闪存
RAM 容量: 768 x 8
电压 - 电源 (Vcc/Vdd): 2 V ~ 5.5 V
数据转换器: A/D 10x10b
振荡器型: 内部
工作温度: -40°C ~ 85°C
封装/外壳: 28-SOIC(0.295",7.50mm 宽)
包装: 带卷 (TR)
PIC18F2450/4450
DS39760A-page 128
Advance Information
2006 Microchip Technology Inc.
The CCPR1H register and a 2-bit internal latch are
used to double-buffer the PWM duty cycle. This
double-buffering is essential for glitchless PWM
operation.
When the CCPR1H and 2-bit latch match TMR2,
concatenated with an internal 2-bit Q clock or 2 bits of
the TMR2 prescaler, the CCP1 pin is cleared.
The maximum PWM resolution (bits) for a given PWM
frequency is given by the equation:
EQUATION 13-3:
13.4.3
SETUP FOR PWM OPERATION
The following steps should be taken when configuring
the CCP module for PWM operation:
1.
Set the PWM period by writing to the PR2
register.
2.
Set the PWM duty cycle by writing to the
CCPR1L register and CCP1CON<5:4> bits.
3.
Make the CCP1 pin an output by clearing the
appropriate TRIS bit.
4.
Set the TMR2 prescale value, then enable
Timer2 by writing to T2CON.
5.
Configure the CCP module for PWM operation.
TABLE 13-3:
EXAMPLE PWM FREQUENCIES AND RESOLUTIONS AT 40 MHz
TABLE 13-4:
REGISTERS ASSOCIATED WITH PWM AND TIMER2
Note:
If the PWM duty cycle value is longer than
the PWM period, the CCP1 pin will not be
cleared.
FOSC
FPWM
---------------
log
2
()
log
-----------------------------bits
=
PWM Resolution (max)
PWM Frequency
2.44 kHz
9.77 kHz
39.06 kHz
156.25 kHz
312.50 kHz
416.67 kHz
Timer Prescaler (1, 4, 16)
16
41111
PR2 Value
FFh
3Fh
1Fh
17h
Maximum Resolution (bits)
10
8
7
6.58
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Reset
Values
on page
INTCON
GIE/GIEH PEIE/GIEL
TMR0IE
INT0IE
RBIE
TMR0IF
INT0IF
RBIF
RCON
IPEN
SBOREN(1)
RI
TO
PD
POR
BOR
PIR1
ADIF
RCIF
TXIF
CCP1IF
TMR2IF
TMR1IF
PIE1
ADIE
RCIE
TXIE
CCP1IE
TMR2IE
TMR1IE
IPR1
ADIP
RCIP
TXIP
CCP1IP
TMR2IP
TMR1IP
TRISC
TRISC7
TRISC6
TRISC2
TRISC1
TRISC0
TMR2
Timer2 Register
PR2
Timer2 Period Register
T2CON
T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON
T2CKPS1
T2CKPS0
CCPR1L
Capture/Compare/PWM Register 1 Low Byte
CCPR1H
Capture/Compare/PWM Register 1 High Byte
CCP1CON
DC1B1
DC1B0
CCP1M3
CCP1M2
CCP1M1
CCP1M0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by PWM or Timer2.
Note 1:
The SBOREN bit is only available when BOREN<1:0> = 01; otherwise, the bit reads as ‘0’.
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