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参数资料
型号： PIC18LF2450T-I/SO
厂商： Microchip Technology
文件页数： 39/143页
文件大小： 0K
描述： IC PIC MCU FLASH 8KX16 28SOIC
标准包装： 1,600
系列： PIC® 18F
核心处理器： PIC
芯体尺寸： 8-位
速度： 48MHz
连通性： UART/USART，USB
外围设备： 欠压检测/复位，HLVD，POR，PWM，WDT
输入/输出数： 23
程序存储器容量： 16KB（8K x 16）
程序存储器类型： 闪存
RAM 容量： 768 x 8
电压 - 电源 (Vcc/Vdd)： 2 V ~ 5.5 V
数据转换器： A/D 10x10b
振荡器型： 内部
工作温度： -40°C ~ 85°C
封装/外壳： 28-SOIC（0.295"，7.50mm 宽）
包装： 带卷 (TR)
PIC18F2450/4450
2006 Microchip Technology Inc.
Advance Information
DS39760A-page 131
The PPBRST bit (UCON<6>) controls the Reset status
when Double-Buffering mode (ping-pong buffering) is
used. When the PPBRST bit is set, all Ping-Pong
Buffer Pointers are set to the Even buffers. PPBRST
has to be cleared by firmware. This bit is ignored in
buffering modes not using ping-pong buffering.
The PKTDIS bit (UCON<4>) is a flag indicating that the
SIE has disabled packet transmission and reception.
This bit is set by the SIE when a SETUP token is
received to allow setup processing. This bit cannot be
set by the microcontroller, only cleared; clearing it
allows the SIE to continue transmission and/or
reception. Any pending events within the Buffer
Descriptor Table will still be available, indicated within
the USTAT register’s FIFO buffer.
The RESUME bit (UCON<2>) allows the peripheral to
perform a remote wake-up by executing Resume
signaling. To generate a valid remote wake-up,
firmware must set RESUME for 10 ms and then clear
the bit. For more information on Resume signaling, see
Sections 7.1.7.5, 11.4.4 and 11.9 in the USB 2.0
specification.
The SUSPND bit (UCON<1>) places the module and
supporting circuitry (i.e., voltage regulator) in a low-
power mode. The input clock to the SIE is also
disabled. This bit should be set by the software in
response to an IDLEIF interrupt. It should be reset by
the microcontroller firmware after an ACTVIF interrupt
is observed. When this bit is active, the device remains
attached to the bus but the transceiver outputs remain
Idle. The voltage on the VUSB pin may vary depending
on the value of this bit. Setting this bit before a IDLEIF
request will result in unpredictable bus behavior.
14.2.2
USB CONFIGURATION REGISTER
(UCFG)
Prior to communicating over USB, the module’s
associated internal and/or external hardware must be
configured. Most of the configuration is performed with
the UCFG register (Register 14-2). The separate USB
voltage regulator (see Section 14.2.2.7 “Internal
Regulator”) is controlled through the Configuration
registers.
The UFCG register contains most of the bits that
control the system level behavior of the USB module.
These include:
Bus Speed (full speed versus low speed)
On-Chip Transceiver Enable
Ping-Pong Buffer Usage
The UCFG register also contains two bits which aid in
module testing, debugging and USB certifications.
These bits control output enable state monitoring and
eye pattern generation.
14.2.2.1
Internal Transceiver
The USB peripheral has a built-in, USB 2.0, full-speed
and low-speed compliant transceiver, internally con-
nected to the SIE. This feature is useful for low-cost
single chip applications. The UTRDIS bit (UCFG<3>)
controls the transceiver; it is enabled by default
(UTRDIS = 0). The FSEN bit (UCFG<2>) controls the
transceiver speed; setting the bit enables full-speed
operation.
The USB specification requires 3.3V operation for
communications; however, the rest of the chip may be
running at a higher voltage. Thus, the transceiver is
supplied power from a separate source, VUSB.
14.2.2.2
External Transceiver
This module provides support for use with an off-chip
transceiver. The off-chip transceiver is intended for
applications where physical conditions dictate the
location of the transceiver to be away from the SIE. For
example, applications that require isolation from the
USB could use an external transceiver through some
isolation to the microcontroller’s SIE (Figure 14-2).
External transceiver operation is enabled by setting the
UTRDIS bit.
FIGURE 14-2:
TYPICAL EXTERNAL
TRANSCEIVER WITH
ISOLATION
Note:
While in Suspend mode, a typical bus
powered USB device is limited to 500
μA
of current. This is the complete current
drawn by the PICmicro device and its sup-
porting circuitry. Care should be taken to
assure minimum current draw when the
device enters Suspend mode.
Note:
The USB speed, transceiver and pull-up
should only be configured during the mod-
ule setup phase. It is not recommended to
switch these settings while the module is
enabled.
PIC
Microcontroller
Transceiver
VPO
UOE
Note:
The above setting shows a simplified schematic
for a full-speed configuration using an external
transceiver with isolation.
VP
RCV
VMO
VM
D+
D-
Isolation
1.5 k
Ω
3.3V Derived
from USB
VUSB
VDD
VDD Isolated
from USB
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相关代理商/技术参数
参数描述
PIC18LF2455-I/SO 功能描述:8位微控制器 -MCU 24kBF 2048RM FSUSB2 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC18LF2455-I/SP 功能描述:8位微控制器 -MCU 24kBF 2048RM FSUSB2 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC18LF2455-I/SP 制造商:Microchip Technology Inc 功能描述:8 Bit Microcontroller Clock Speed:48MHz
PIC18LF2455T-I/SO 功能描述:8位微控制器 -MCU 24kBF 2048RM FSUSB2 RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
PIC18LF2458-I/SO 功能描述:8位微控制器 -MCU 24KB Flash 2KB RAM RoHS:否 制造商:Silicon Labs 核心:8051 处理器系列:C8051F39x 数据总线宽度:8 bit 最大时钟频率:50 MHz 程序存储器大小:16 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:1.8 V to 3.6 V 工作温度范围:- 40 C to + 105 C 封装 / 箱体:QFN-20 安装风格:SMD/SMT
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