SBSLITE Telecom Standard Product Data Sheet
Preliminary
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-2010883, Issue 2
72
Register 000H: SBSLITE Master Reset
Bit
Type
Function
Default
Bit 15
Unused
0
Bit 14
Unused
0
Bit 13
Unused
0
Bit 12
Unused
0
Bit 11
Unused
0
Bit 10
Unused
0
Bit 9
Unused
0
Bit 8
Unused
0
Bit 7
Unused
0
Bit 6
Unused
0
Bit 5
R/W
Reserved
0
Bit 4
R/W
Reserved
0
Bit 3
R/W
Reserved
0
Bit 2
R/W
Reserved
0
Bit 1
R/W
ARESET
0
Bit 0
R/W
DRESET
0
Reserved
These bits must be set low for proper operation of the SBSLITE.
ARESET
The analogue reset bit (ARESET) allows the analogue circuitry in the SBSLITE to be reset
and disabled under software control. When the ARESET bit is set high, all SBSLITE
analogue circuitry is held in reset and disabled. This bit is not self-clearing. Therefore, it
must be set low to bring the affected circuitry out of reset and enable it. Holding SBSLITE in
analogue reset state places it into a low power, disabled mode. A hardware reset clears the
ARESET bit, thus negating the analogue software reset.
DRESET
The digital reset bit (DRESET) allows the digital circuitry in the SBSLITE to be reset under
software control. When the DRESET bit is set high, all SBSLITE digital circuitry is held in
reset with the exception of this register. This bit is not self-clearing. Therefore, it must be set
low to bring the affected circuitry out of reset. Holding SBSLITE in digital reset state places
it into a low power, digital stand-by mode. A hardware reset clears the DRESET bit, thus
negating the digital software reset.