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| 型号： | PSD835G2V-C-12M |
| 厂商： | 意法半导体 |
| 英文描述： | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| 中文描述： | 在8片位微控制器可配置存储系统 |
| 文件页数： | 45/110页 |
| 文件大小： | 570K |
| 代理商： | PSD835G2V-C-12M |
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PSD835G2
PSD8XX Family
t A simple interface to 8-bit microcontrollers that use either multiplexed or
non-multiplexed busses. The bus interface logic uses the control signals generated by
the microcontroller automatically when the address is decoded and a read or write is
performed. A partial list of the MCU families supported include:
Intel 8031, 80196, 80188, 80C251
Motorola 68HC11 and 68HC16
Philips 8031 and 80C51XA
Zilog Z80, Z8 and Z180
Infineon C500 family
t 4 Mbit Flash memory. This is the main Flash memory. It is divided into eight
equal-sized blocks that can be accessed with user-specified addresses.
t Internal secondary 256 Kbit Flash boot memory. It is divided into four equal-sized
blocks that can be accessed with user-specified addresses. This secondary memory
brings the ability to execute code and update the main Flash concurrently.
t 64 Kbit SRAM. The SRAM’s contents can be protected from a power failure by
connecting an external battery.
t CPLD with 16 Output Micro
Cells (OMCs) and 24 Input MicroCells (IMCs). The
CPLD may be used to efficiently implement a variety of logic functions for internal
and external control. Examples include state machines, loadable shift registers, and
loadable counters. The CPLD can also generate eight external chip selects.
t Decode PLD (DPLD) that decodes address for selection of internal memory blocks.
t 52 individually configurable I/O port pins that can be used for the following functions:
MCU I/Os
PLD I/Os
Latched MCU address output
Special function I/Os.
I/O ports may be configured as open-drain outputs.
t Standby current as low as 50 A for 5 V devices.
t Built-in JTAG compliant serial port allows full-chip In-System Programmability (ISP).
With it, you can program a blank device or reprogram a device in the factory or the field.
t Internal page register that can be used to expand the microcontroller address space
by a factor of 256.
t Internal programmable Power Management Unit (PMU) that supports a low power
mode called Power Down Mode. The PMU can automatically detect a lack of
microcontroller activity and put the PSD8XX into Power Down Mode.
t Erase/Write cycles:
Flash memory – 100,000 minimum
PLD – 1,000 minimum
2.0
Key Features
3
3.0 PSD8XX
Series
Part #
Flash
Main
Boot
Serial ISP
Memory
PSD8XX
I/O
PLD
Input
Output
PLD
JTAG/ISP
Kbit
SRAM
Supply
Series
Device
Pins
Inputs Macrocells Macrocells Outputs
Port
8 Sectors
(4 Sectors)
Kbit
Voltage
PSD835G2
52
24
16
24
Yes
4096
256
64
5V
PSD8XX
PSD813F2
27
57
24
16
19
Yes
1024
256
16
5V
PSD834F2
27
57
24
16
19
Yes
2048
256
64
5V
PSD833F2
27
57
24
16
19
Yes
1024
256
64
5V
Table 1. PSD8XX Product Matrix
相关PDF资料 |
PDF描述 |
|---|---|
| PSD835G2V-C-12JI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G2V-C-12J | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G2V-C-70B81I | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G2V-C-70J | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
| PSD835G2V-C-70JI | Configurable Memory System on a Chip for 8-Bit Microcontrollers |
相关代理商/技术参数 |
参数描述 |
|---|---|
| PSD853F2-70J | 功能描述:SPLD - 简单可编程逻辑器件 5.0V 1M 70ns RoHS:否 制造商:Texas Instruments 逻辑系列:TICPAL22V10Z 大电池数量:10 最大工作频率:66 MHz 延迟时间:25 ns 工作电源电压:4.75 V to 5.25 V 电源电流:100 uA 最大工作温度:+ 75 C 最小工作温度:0 C 安装风格:Through Hole 封装 / 箱体:DIP-24 |
| PSD853F2-70M | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 70ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD853F2-90J | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD853F2-90JI | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
| PSD853F2-90M | 功能描述:CPLD - 复杂可编程逻辑器件 5.0V 1M 90ns RoHS:否 制造商:Lattice 系列: 存储类型:EEPROM 大电池数量:128 最大工作频率:333 MHz 延迟时间:2.7 ns 可编程输入/输出端数量:64 工作电源电压:3.3 V 最大工作温度:+ 90 C 最小工作温度:0 C 封装 / 箱体:TQFP-100 |
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