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参数资料
型号： S29CD032J1MFAI020
厂商： SPANSION LLC
元件分类： PROM
英文描述： 1M X 32 FLASH 2.7V PROM, 54 ns, PBGA80
封装： 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80
文件页数： 56/78页
文件大小： 1825K
代理商： S29CD032J1MFAI020
4
S29CD-J & S29CL-J Flash Family
S29CD-J_CL-J_00_B1 September27,2006
Prel imi n ary
Figures
Figure 8.1
Asynchronous Read Operation ...........................................................................................................21
Figure 8.2
Synchronous/Asynchronous State Diagram .........................................................................................23
Figure 8.3
End of Burst Indicator (IND/WAIT#) Timing for Linear 8-Word Burst Operation ........................................25
Figure 8.4
Initial Burst Delay Control.................................................................................................................26
Figure 8.5
Program Operation ..........................................................................................................................29
Figure 8.6
Erase Operation...............................................................................................................................31
Figure 8.7
Data# Polling Algorithm....................................................................................................................35
Figure 8.8
Toggle Bit Algorithm ........................................................................................................................38
Figure 9.1
Advanced Sector Protection/Unprotection............................................................................................41
Figure 9.2
PBB Program Operation ....................................................................................................................43
Figure 9.3
PPB Erase Operation ........................................................................................................................44
Figure 13.1
Maximum Negative Overshoot Waveform............................................................................................50
Figure 13.2
Maximum Positive Overshoot Waveform .............................................................................................50
Figure 15.1
ICC1 Current vs. Time (Showing Active and Automatic Sleep Currents)....................................................53
Figure 15.2
Typical ICC1 vs. Frequency ................................................................................................................53
Figure 16.1
Test Setup......................................................................................................................................54
Figure 17.1
Input Waveforms and Measurement Levels .........................................................................................54
Figure 18.1
VCC and VIO Power-up Diagram .........................................................................................................55
Figure 18.2
Conventional Read Operations Timings ...............................................................................................56
Figure 18.3
Asynchronous Command Write Timing................................................................................................57
Figure 18.4
Burst Mode Read (x32 Mode) ............................................................................................................59
Figure 18.5
Synchronous Command Write/Read Timing .........................................................................................59
Figure 18.6
RESET# Timings..............................................................................................................................60
Figure 18.7
WP# Timing....................................................................................................................................61
Figure 18.8
Program Operation Timings...............................................................................................................62
Figure 18.9
Chip/Sector Erase Operation Timings..................................................................................................63
Figure 18.10
Back-to-back Cycle Timings ..............................................................................................................63
Figure 18.11
Data# Polling Timings (During Embedded Algorithms) ..........................................................................64
Figure 18.12
Toggle Bit Timings (During Embedded Algorithms) ...............................................................................64
Figure 18.13
DQ2 vs. DQ6 for Erase/Erase Suspend Operations................................................................................64
Figure 18.14
Synchronous Data Polling Timing/Toggle Bit Timings ............................................................................65
Figure 18.15
Sector Protect/Unprotect Timing Diagram ...........................................................................................65
Figure 18.16
Alternate CE# Controlled Write Operation Timings................................................................................66
相关PDF资料
PDF描述
S29CL016J0JFAI112 512K X 32 FLASH 3.3V PROM, 54 ns, PBGA80
S29CL016J0JFFI130 512K X 32 FLASH 3.3V PROM, 54 ns, PBGA80
S29CL016J0MQAI113 512K X 32 FLASH 3.3V PROM, 54 ns, PQFP80
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S29CL016J1MFAI123 512K X 32 FLASH 3.3V PROM, 54 ns, PBGA80
相关代理商/技术参数
参数描述
S29CL016J0JQFM030 制造商:Spansion 功能描述:FLASH PARALLEL 3.3V 16MBIT 512KX32 54NS 80PQFP - Trays
S29CL016J0JQFM030P 制造商:Spansion 功能描述:AUTO 3.3V 512KX32 FLASH - Trays
S29CL016J0JQFM030U 制造商:Spansion 功能描述:32M (4MX8/2MX16) 3V REG, MIRRORBIT, TOP, FBGA48, IND - Trays
S29CL016J0JQFM03U 制造商:Spansion 功能描述:32M (4MX8/2MX16) 3V REG, MIRRORBIT, TOP, FBGA48, IND - Trays
S29CL016J0MQFM030 制造商:Spansion 功能描述:
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