- 您现在的位置：买卖IC网 > PDF目录192297 > S29GL032M10BAIR42 (SPANSION LLC) Conductive Polymer Chip Capacitors / T520 Series - High Temperature; Capacitance [nom]: 33uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Conductive Polymer; Lead Style: Surface-Mount Chip; Lead Dimensions: 3528-21; Termination: Solder Coated (SnPb, Pb 5% min); Body Dimensions: 3.5mm x 2.8mm x 1.9mm; Temperature Range: -55C to +125C; Container: Tape & Reel; Qty per Container: 2,000; Features: Low Temperature PDF资料下载
参数资料
| 型号： | S29GL032M10BAIR42 |
| 厂商： | SPANSION LLC |
| 元件分类： | PROM |
| 英文描述： | Conductive Polymer Chip Capacitors / T520 Series - High Temperature; Capacitance [nom]: 33uF; Working Voltage (Vdc)[max]: 6.3V; Capacitance Tolerance: +/-20%; Dielectric: Conductive Polymer; Lead Style: Surface-Mount Chip; Lead Dimensions: 3528-21; Termination: Solder Coated (SnPb, Pb 5% min); Body Dimensions: 3.5mm x 2.8mm x 1.9mm; Temperature Range: -55C to +125C; Container: Tape & Reel; Qty per Container: 2,000; Features: Low Temperature |
| 中文描述： | 2M X 16 FLASH 3V PROM, 100 ns, PBGA48 |
| 封装： | 8 X 9 MM, FBGA-48 |
| 文件页数： | 83/116页 |
| 文件大小： | 6024K |
| 代理商： | S29GL032M10BAIR42 |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页第76页第77页第78页第79页第80页第81页第82页当前第83页第84页第85页第86页第87页第88页第89页第90页第91页第92页第93页第94页第95页第96页第97页第98页第99页第100页第101页第102页第103页第104页第105页第106页第107页第108页第109页第110页第111页第112页第113页第114页第115页第116页
February 7, 2007 S29GL-M_00_B8
S29GL-M MirrorBitTM Flash Family
67
Data
Sheet
The device does not require the system to preprogram prior to erase. The Embedded Erase algo-
rithm automatically programs and verifies the entire memory for an all zero data pattern prior to
electrical erase. The system is not required to provide any controls or timings during these
operations.
After the command sequence is written, a sector erase time-out of 50 s occurs. During the time-
out period, additional sector addresses and sector erase commands can be written. Loading the
sector erase buffer can be done in any sequence, and the number of sectors can be from one
sector to all sectors. The time between these additional cycles must be less than 50 s, otherwise
erasure may begin. Any sector erase address and command following the exceeded time-out can
or cannot be accepted. It is recommended that processor interrupts be disabled during this time
to ensure all commands are accepted. The interrupts can be re-enabled after the last Sector Erase
command is written. Any command other than Sector Erase or Erase Suspend during the
time-out period resets the device to the read mode. Note that the Secured Silicon Sector,
autoselect, and CFI functions are unavailable when an erase operation is in progress. The system
must rewrite the command sequence and any additional addresses and commands.
The system can monitor DQ3 to determine if the sector erase timer has timed out (See the section
on DQ3: Sector Erase Timer.). The time-out begins from the rising edge of the final WE# pulse in
the command sequence.
When the Embedded Erase algorithm is complete, the device returns to reading array data and
addresses are no longer latched. The system can determine the status of the erase operation by
reading DQ7, DQ6, or DQ2 in the erasing sector. See Write Operation Status for information on
these status bits.
Once the sector erase operation starts, only the Erase Suspend command is valid. All other com-
mands are ignored. However, note that a hardware reset immediately terminates the erase
operation. If that occurs, the sector erase command sequence should be reinitiated once the de-
vice returns to reading array data, to ensure data integrity.
Figure 6 illustrates the algorithm for the erase operation. See Erase and Programming Perfor-
l
Notes:
2. See DQ3: Sector Erase Timer for information on the sector erase timer.
Figure 6. Erase Operation
START
Write Erase
Command Sequence
(Notes 1, 2)
Data Poll to Erasing
Bank from System
Data = FFh?
No
Yes
Erasure Completed
Embedded
Erase
algorithm
in progress
相关PDF资料 |
PDF描述 |
|---|---|
| S29GL032M10BAIR43 | MirrorBit Flash Family |
| S29GL032M10BFIR42 | MirrorBit Flash Family |
| S29GL032M10BFIR32 | T528 Series - I, M, Z Case Sizes - Face Down Termination Tantalum Surface Mount Capacitor; Capacitance [nom]: 330uF; Working Voltage (Vdc)[max]: 4V; Capacitance Tolerance: +/-20%; Dielectric: Tantalum, Solid; ESR: 9.0mΩ; Lead Style: Surface-Mount Chip; Lead Dimensions: 7343-17; Termination: 100% Tin (Sn); Body Dimensions: 7.3mm x 4.3mm x 1.7mm; Temperature Range: -55C to +105C; Container: Tape & Reel; Qty per Container: 1,000; Features: Face Down Termination |
| S29GL032M10BFIR40 | MirrorBit Flash Family |
| S29GL032M10TAIR00 | MirrorBit Flash Family |
相关代理商/技术参数 |
参数描述 |
|---|---|
| S29GL032M10BAIR43 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology |
| S29GL032M10BAIR50 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BAIR52 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BAIR53 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BAIR60 | 制造商:SPANSION 制造商全称:SPANSION 功能描述:MirrorBit Flash Family |
发布紧急采购，3分钟左右您将得到回复。