- 您现在的位置：买卖IC网 > PDF目录195454 > SST49LF003B-33-4C-NH (SILICON STORAGE TECHNOLOGY INC) 384K X 8 FLASH 3V PROM, 11 ns, PQCC32 PDF资料下载
参数资料
| 型号： | SST49LF003B-33-4C-NH |
| 厂商： | SILICON STORAGE TECHNOLOGY INC |
| 元件分类： | PROM |
| 英文描述： | 384K X 8 FLASH 3V PROM, 11 ns, PQCC32 |
| 封装： | PLASTIC, MS-016AE, LCC-32 |
| 文件页数： | 5/43页 |
| 文件大小： | 500K |
| 代理商： | SST49LF003B-33-4C-NH |
第1页第2页第3页第4页当前第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页
Data Sheet
2 Mbit / 3 Mbit / 4 Mbit LPC Firmware Flash
SST49LF002B / SST49LF003B / SST49LF004B
13
2005 Silicon Storage Technology, Inc.
S71232-05-000
1/05
LPC MODE
Device Operation
The LPC mode uses a 5-signal communication interface
consisting of one control line, LFRAME#, which is driven by
the host to start or abort a bus cycle, and a 4-bit data bus,
LAD[3:0], which is used to communicate cycle type, cycle
direction, ID selection, address, data and sync fields. The
device enters standby mode when LFRAME# is high and
no internal operation is in progress.
The SST49LF00xB supports both single-byte Firmware
Memory Read/Write cycles and single-byte LPC Memory
Read/Write cycles as defined in Intel’s Low-Pin-Count
Interface Specification, Revision 1.1. The host drives
LFRAME# low for one or more clock cycles to initiate an
LPC cycle. The last latched value of LAD[3:0] before
LFRAME# is the START value. The START value deter-
mines whether the SST49LF00xB will respond to a Firm-
ware Memory Read/Write cycle or a LPC Memory Read/
Write cycle as defined in Table 4.
See following sections for details of Firmware Memory and
LPC Memory cycle types. JEDEC standard SDP (Soft-
ware Data Protection) Program and Erase command
sequences are used to initiate Firmware and LPC Memory
Program and Erase operations. See Table 18 for a listing
of Program and Erase commands. Chip-Erase is only
available in PP mode.
TABLE
4: FIRMWARE AND LPC MEMORY CYCLES
START FIELD DEFINITION
START
Value
Definition
0000
Start of an LPC memory cycle. The direction
(Read or Write) is determined by the second field
of the LPC cycle.
1101
Start of a Firmware Memory Read cycle
1110
Start of a Firmware Memory Write cycle
T4.0 1232
相关PDF资料 |
PDF描述 |
|---|---|
| SSTAR-01 | SPECIALTY TELECOM CIRCUIT |
| SSTV16857MTDX | |
| SSTV16857MTDX_NL | |
| SSTV16857MTD_NL | |
| SSW-1-05-22-SM-S-VS | 5 CONTACT(S), FEMALE, STRAIGHT TWO PART BOARD CONNECTOR, SURFACE MOUNT |
相关代理商/技术参数 |
参数描述 |
|---|---|
| SST49LF004A | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub |
| SST49LF004A-33-4C-NH | 制造商:Silicon Storage Technology (SST) 功能描述:NOR Flash, 512K x 8, 32 Pin, Plastic, PLCC |
| SST49LF004A-33-4C-WH | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:2 Mbit / 3 Mbit / 4 Mbit / 8 Mbit Firmware Hub |
| SST49LF004B | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:4 Mbit Firmware Hub |
| SST49LF004B_06 | 制造商:SST 制造商全称:Silicon Storage Technology, Inc 功能描述:4 Mbit Firmware Hub |
发布紧急采购，3分钟左右您将得到回复。