参数资料
型号: SST55LC100M-45-C-BWE
元件分类: 存储控制器/管理单元
英文描述: IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA84
封装: 9 X 9 MM, ROHS COMPLIANT, TFBGA-84
文件页数: 10/75页
文件大小: 1040K
代理商: SST55LC100M-45-C-BWE
18
Advance Information
CompactFlash Card Controller
SST55LC100M
2006 Silicon Storage Technology, Inc.
S71316-00-000
3/06
8.0 CARD CONFIGURATION
The CompactFlash cards are identified by appropriate information in the Card Information Structure (CIS). The fol-
lowing configuration registers are used to coordinate the I/O spaces and the Interrupt level of cards that are located
in the system. In addition, these registers provide a method for accessing status information about the Compact-
Flash card that may be used to arbitrate between multiple interrupt sources on the same interrupt level or to
replace status information that appears on dedicated pins in memory cards that have alternate use in I/O cards.
Note: The location of the card configuration registers should always be read from the CIS locations 0000H to 0198H.
No writes should be performed to the CompactFlash card attribute memory except to the card configuration register addresses.
All other attribute memory locations are reserved.
TABLE
8-1:Registers and Memory Space Decoding
CE2#
CE1#
REG#
OE#
WE#
A10
A9
A8-A4
A3
A2
A1
A0
Selected Space
1
X
XX
XXXX
Standby
X
0
1
0
1
XX
X
0
Configuration Registers Read
1
0
1
0
1
X
XX
XXXX
Common Memory Read (8 bit D7-D0)
0
1
0
1
X
XX
XXXX
Common Memory Read (8 bit D15-D8)
0
1
0
1
X
XX
X
0
Common Memory Read (16 bit D15-D0)
X
0
1
0
1
XX
X
0
Configuration Registers Write
1
0
1
0
X
XX
XXXX
Common Memory Write (8 bit D7-D0)
0
1
0
X
XX
XXXX
Common Memory Write (8 bit D15-D8)
0
1
0
X
XX
X
0
Common Memory Write (16 bit D15-D0)
X
0
1
0
XX
X
0
Card Information Structure Read
1
0
1
0
XX
X
0
Invalid Access (CIS Write)
1
0
1
X
XX
X
1
Invalid Access (Odd Attribute Read)
1
0
1
0
X
XX
X
1
Invalid Access (Odd Attribute Write)
0
1
0
1
X
XX
XXXX
Invalid Access (Odd Attribute Read)
0
1
0
1
0
X
XX
XXXX
Invalid Access (Odd Attribute Write)
T8-1.0 1316
TABLE
8-2:Configuration Registers Decoding
CE2#
CE1#
REG#
OE#
WE#
A10
A9
A8-A4
A3
A2
A1
A0
Selected Register
X
0
1
0
1
00
0
Configuration Option Reg Read
X
0
1
0
1
00
0
Configuration Option Reg Write
X
0
1
0
1
00
0
1
0
Card Status Register Read
X
0
1
0
1
00
0
1
0
Card Status Register Write
X
0
1
0
1
00
0
1
0
Pin Replacement Register Read
X
0
1
0
1
00
0
1
0
Pin Replacement Register Write
X
0
1
0
1
00
0
1
0
Socket and Copy Register Read
X
0
1
0
1
00
0
1
0
Socket and Copy Register Write
T8-2.0 1316
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