参数资料
型号: SST55LC100M-45-C-BWE
元件分类: 存储控制器/管理单元
英文描述: IDE COMPATIBLE, FLASH MEMORY DRIVE CONTROLLER, PBGA84
封装: 9 X 9 MM, ROHS COMPLIANT, TFBGA-84
文件页数: 57/75页
文件大小: 1040K
代理商: SST55LC100M-45-C-BWE
60
Advance Information
CompactFlash Card Controller
SST55LC100M
2006 Silicon Storage Technology, Inc.
S71316-00-000
3/06
10.2.1 Attribute Memory Read Timing Specification
The Attribute Memory access time is defined as 100 ns. Detailed timing specifications are shown in Table 10-7.
FIGURE
10-2: Attribute Memory Read Timing Diagram
TABLE
10-7:Attribute Memory Read Timing
Speed Version
100 ns
Item
Symbol
IEEE Symbol
Min1
1. DOUT signifies data provided by the CompactFlash card to the system.
The CE# signal or both the OE# signal and the WE# signal must be de-asserted between consecutive cycle operations.
All AC specifications are guaranteed by design.
Units
Read Cycle Time
tc(R)
tAVAV
100
ns
Address Access Time
ta(A)
tAVQV
100
ns
Card Enable Access Time
ta(CE)
tELQV
100
ns
Output Enable Access Time
ta(OE)
tGLQV
50
ns
Output Disable Time from CE#
tdis(CE)
tEHQZ
50
ns
Output Disable Time from OE#
tdis(OE)
tGHQZ
50
ns
Address Setup Time
tsu(A)
tAVGL
10
ns
Output Enable Time from CE#
ten(CE)
tELQNZ
5
ns
Output Enable Time from OE#
ten(OE)
tGLQNZ
5
ns
Data Valid from Address Change
tv(A)
tAXQX
0
ns
T10-7.0 1316
1316 F03.0
An
tc(R)
ta(A)
ta(CE)
ta(OE)
DOUT
tdis(OE)
tdis(CE)
tv(A)
ten(CE)
ten(OE)
tsu(A)
REG#
CE#
OE#
DOUT
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