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| 型号： | ST10F269Z2Q6 |
| 厂商： | STMICROELECTRONICS |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封装： | 28 X 28 MM, PLASTIC, QFP-144 |
| 文件页数： | 22/184页 |
| 文件大小： | 3276K |
| 代理商： | ST10F269Z2Q6 |
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18 - SYSTEM RESET
ST10F269
118/184
programmed
wait
states.
When
READY
is
sampled inactive (high) after the programmed wait
states the running external bus cycle is aborted.
Then the internal reset sequence (1024 TCL) is
started. The microcontroller behaviour is the
same as for a short hardware reset, except that
only
P0.12...P0.6
bits
are
latched,
while
previously latched values of P0.5...P0.2 are
cleared.
18.5 - RSTOUT, RSTIN, Bidirectional Reset
18.5.1 - RSTOUT Pin
The RSTOUT pin is driven active (low level) at the
beginning of any reset sequence (synchronous/
asynchronous hardware, software and watchdog
timer resets). RSTOUT pin stays active low
beyond the end of the initialization routine, until
the
protected
EINIT
instruction
(End
of
Initialization) is completed.
18.5.2 - Bidirectional Reset
The bidirectional reset function is enabled by
setting SYSCON.BDRSTEN (bit 3). This function
is disabled by any reset sequence which always
clears the SYSCON.BDRSTEN bit.
It can only be enabled during the initialization
routine, before EINIT instruction is completed.
If VRPD voltage drops below the RPD pin
threshold (typically 2.5V for VDD = 5V) when
RSTIN pin is low or when RSTIN pin is internally
pulled low, the ST10 reset circuitry disables the
bidirectional reset function and RSTIN pin is no
more pulled low. The reset is processed as an
asynchronous reset.
The bidirectional reset function is useful for
external
peripherals
with
on-chip
memory
because the reset signal output on RSTIN pin is
de-activated before the CPU starts its first
instruction fetch.
18.5.3 - RSTIN pin
When the bidirectional reset function is enabled,
the open-drain of the RSTIN pin is activated,
pulling down the reset signal, for the duration of
the internal reset sequence. See Figure 56 and
Figure 57. At the end of the sequence the
pull-down is released and the RSTIN pin gets
back its input function.
The bidirectional reset function can be used:
– to convert SW or WD resets to a hardware reset
so that the configuration can be (re-)latched
from PORT0.
– to make visible SW or WDT resets at RSTIN pin
whenever RSTIN is the only reset signal used by
the application (RSTOUT not used).
– to get a die-activated reset signal before CPU
starts its first instruction fetch.
The
configuration
latched
from
PORT0
is
determined by the kind of reset generated by the
application. (Refer to Table 38).
Converting a SW or WDT reset to a hardware
reset allows the PLL to re-lock or the PLL
configuration to be re-latched, provided a SW or
WDT reset is generated by the application
program is case of PLL unlock or input clock fail.
18.6 - Reset Circuitry
The
internal reset circuitry is
described in
An internal pull-up resistor is implemented on
RSTIN pin. (50k
minimum, to 250k maximum).
The minimum reset time must be calculated using
the lowest value. In addition, a programmable
pull-down (SYSCON.BDRSTEN bit 3) drives the
RSTIN pin according to the internal reset state.
The RSTOUT pin provides a signals to the
application. (Refer to Section 18.5 -).
A weak internal pull-down is connected to the
RPD pin to discharge external capacitor to VSS at
a rate of 100
A to 200A. This Pull-down is
turned on when RSTIN pin is low
If bit PWDCFG of SYSCON register is set, an
internal pull-up resistor is activated at the end of
the reset sequence. This pull-up charges the
capacitor connected to RPD pin.
If the bidirectional reset function is not used, the
simplest way to reset ST10F269 is to connect
external components as shown in Figure 59. It
works with reset from application (hardware or
manual) and with power-on. The value of C1
capacitor, connected on RSTIN pin with internal
pull-up resistor (50k
to 250k), must lead to a
charging time long enough to let the internal or
external oscillator and / or the on-chip PLL to
stabilize.
The R0-C0 components on RPD pin are mainly
implemented to provide a time delay to exit Power
down mode (see Chapter : Power Reduction
on page 122). Nevertheless, they drive
RPD pin level during resets and they lead to
different reset modes as explained hereafter. On
power-on, C0 is total discharged, a low level on
RPD pin forces an asynchronous hardware reset.
C0 capacitor starts to charge through R0 and at
the end of reset sequence ST10F269 restarts.
RPD pin threshold is typically 2.5V.
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相关代理商/技术参数 |
参数描述 |
|---|---|
| ST10F269Z2Q6/TR | 功能描述:16位微控制器 - MCU 16B MCU 256K Byte and 12K Byte RAM RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| ST10F269Z2QX | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:16-BIT MCU WITH MAC UNIT, 256K BYTE FLASH MEMORY AND 12K BYTE RAM |
| ST10F269Z2T3 | 功能描述:16位微控制器 - MCU ST10F272 16B MCU RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| ST10F269Z2T6 | 功能描述:16位微控制器 - MCU ST10F272 16B MCU RoHS:否 制造商:Texas Instruments 核心:RISC 处理器系列:MSP430FR572x 数据总线宽度:16 bit 最大时钟频率:24 MHz 程序存储器大小:8 KB 数据 RAM 大小:1 KB 片上 ADC:Yes 工作电源电压:2 V to 3.6 V 工作温度范围:- 40 C to + 85 C 封装 / 箱体:VQFN-40 安装风格:SMD/SMT |
| ST10F269ZX | 制造商:STMICROELECTRONICS 制造商全称:STMicroelectronics 功能描述:16-BIT MCU WITH MAC UNIT, 128K to 256K BYTE FLASH MEMORY AND 12K BYTE RAM |
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