参数资料
型号: ST52E430B/D
厂商: STMICROELECTRONICS
元件分类: 微控制器/微处理器
英文描述: 8-BIT, UVPROM, 20 MHz, MICROCONTROLLER, CDIP32
封装: WINDOWED, SHRINK, CERAMIC, DIP-32
文件页数: 64/120页
文件大小: 502K
代理商: ST52E430B/D
48/120
ST52T430/E430
9. PWM/TIMER
ST52x430 offers three on-chip PWM/Timer
peripherals :TIMER0, TIMER1 and TIMER2.
The ST52x430 timers have the same internal
structure. Basically it consists of an 8-bit counter
with a 16-bit programmable prescaler, thus giving
a maximum count of 224 (see figure 9.1).
Following, the generic timer is called Timer x,
where x can be 0, 1 or 2.
Each timer has two different working modes, that
can be selected by setting the correspondent
TxMODE bits of REG_CONF5, REG_CONF8 and
REG_CONF10 registers: Timer Mode and PWM
(Pulse Width Modulation) Mode.
All the Timers have Autoreload Functions in PWM
Mode.
Each timer output is available, with its negated
signal, on external pins, by setting PxSL bits of
REG_CONF12 and REG_CONF16 (see tables 9.8
and 9.9).
REMARKS: To enable a timer output (TxOUT or
TxOUT) the related pin must be configured in
Output Mode by setting REG_CONF4, and
REG_CONF15 registers (see table 6.4 and 6.6)
In particular, TIMER 0 can utilize also external
START/STOP signals (Input capture and Output
compare), external RESET signal, and external
CLOCK: PA4/T0STRT, PA0/T0RES and
PA5/T0CLK pins.
REMARKS: To use T0RST, T0STR, T0CLK
external signals the related pins must be
configured in Input Mode by setting
REG_CONF4 and REG_CONF15 registers (see
table 6.4 and 6.6)
For each timer, the content of the 8-bit counter is
incremented on the Rising Edge of the 16-bit
prescaler output (PRESCOUT) and it can be read
at any instant of the counting phase then saved in a
location of the RAM memory. The PWM/Timer x
Counter value can be read from the Input Register
PWM_x_COUNT (Input Registers 12, 14 or 16. See
table 2.2)
The PWM/Timer x Status can be read from the
Input Register PWM_x_STATUS (Input Registers
13, 15 or 17. See tables 2.2 and 9.10).
9.1 Timer Mode
Timer Mode is selected fixing TxMODE bit of
REG_CONF5, REG_CONF8 and REG_CONF10
equal to 0 (see tables 9.1, 9.4 and 9.6).
Each TIMERx requires three signals: Timer Clock
(TMRCLKx), Timer Reset (TxRES) and Timer Start
(TxSTRT) (see Figure 9.1). Each of these signals
can be generated internally, or, only for Timer 0,
BIT 0
BIT 1
BIT 2
BIT 3
BIT 4
BIT 5
BIT 14
BIT 15
BIT 3
BIT 0
BIT 1
BIT 2
BIT 6
BIT 4
BIT 5
BIT 7
17 - 1 MULTIPLEXER
16-BIT PRESCALER
8-BIT COUNTER
PRES
LKM
TMRCLK
TxR
TxS
Figure 9.1 Timer Peripheral Block Diagram
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