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| 型号： | TAS3218IPZPR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 消费家电 |
| 英文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP100 |
| 封装： | GREEN, PLASTIC, TQFP-100 |
| 文件页数： | 16/79页 |
| 文件大小： | 1263K |
| 代理商： | TAS3218IPZPR |
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Embedded M8051 WARP Microcontroller
M8051 Addressing Modes
M8051 Boot-Up Sequence
www.ti.com ....................................................................................................................................................................................................... SLES235 – JULY 2008
The embedded M8051 WARP microcontroller provides the overall control for the TAS3218 device. This control
includes device initialization, memory loading, I2C transactions, control pin operations, and participation in most
processing tasks requiring multi-frame processing cycles.
The microcontroller has its own data RAM for storing intermediate values and queuing I2C commands, a fixed
boot program ROM and a programmable program RAM. The microprocessors boot program cannot be altered.
The microcontroller has specialized hardware for a master and slave interface operation, Volume Updates, and a
programmable interval timer interrupt.
The 256 bytes of Internal Data Memory address space is accessible using indirect addressing instructions
(including stack operations). However, only the lower 128 bytes are accessible using direct addressing. The
upper 128 bytes of direct address Data Memory space are used to access ESFRs.
Register Banks
There are four directly addressable register banks, only one of which may be selected at one time. The register
banks occupy Internal Data Memory addresses from 00 hex to 1F hex.
Bit Addressing
The 16 bytes of Internal Data Memory that occupy addresses from 20 hex to 2F hex are bit-addressable. SFRs
that have addresses of the form 1XXXX000 binary are also bit-addressable.
Scratchpad
Internal data memory occupying direct addresses from 30 hex to 7F hex can be used as scratch pad registers or
for the stack.
External Data Memory
External Data RAM occupies a 64K address space. This space contains the External Special Function Data
Registers ESFRs. The ESFRs permit access and control of the hardware features and internal interfaces of the
TAS3218 Digital Signal Processor.
Figure 17 shows the boot-up sequence. M8051 MCU ROM code follows this sequence after device reset
release. After Micro completes boot up application code (RAM code), the microcontroller switches the program
counter from ROM to RAM code by pc_source(esfr - 0xFD).
Copyright 2008, Texas Instruments Incorporated
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Product Folder Link(s): TAS3218
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