参数资料
型号: TLV320AIC22PTR
厂商: Texas Instruments, Inc.
元件分类: Codec
英文描述: DUAL VOIP CODEC
中文描述: 双VoIP编解码器
文件页数: 13/55页
文件大小: 763K
代理商: TLV320AIC22PTR
TLV320AIC22
DUAL VOIP CODEC
SLAS281B – JULY 2000 – REVISED JUNE 2002
20
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
4-bit DAC
The 4-bit DAC can be used to provide bias to any component on the board, such as a liquid-crystal display
(LCD). The output of the 4-bit DAC is controlled through the I2C or the serial interface by writing to the four LSBs
of control register 12. It uses 2s-complement data. The DAC has a settling time of about 5
s, a linearity of ±0.5
LSB, and is a voltage output DAC. It provides a maximum output of 3 V. For a 16-character by 2-line LCD display
module, the contrast control requires 0.2 mA. The input codes and the corresponding output voltages at the
LCDOUT pin are shown in Table 4.
Table 4. 4-Bit DAC Input Code vs Output Voltage
INPUT VALUE
(DECIMAL)
INPUT CODE
(2s COMPLEMENT)
D3–D0
OUTPUT VOLTAGE
7
0111
2.8125
6
0110
2.625
5
0101
2.4375
4
0100
2.25
3
0011
2.0625
2
0010
1.875
1
0001
1.6875
0
0000
1.5
–1
1111
1.3125
–2
1110
1.125
–3
1101
0.9375
–4
1100
0.75
–5
1011
0.5625
–6
1010
0.375
–7
1001
0.1875
–8
1000
0
callerID amplifier
The callerID amplifier has a fixed 0-dB gain (typ), attenuates the low-frequency ring signal, and isolates from
the line. This input also can be connected to the ADC via the analog crosspoint.
line ports
The line ports can be connected, via a transformer, to a telephone line. The driver stage is capable of driving
a 600-
load, differentially, to near rail-to-rail swing. This stage is implemented such that the resistors and
capacitors are integrated. Signal levels at the input pins can be as high as 1.4 Vrms (2 V). The analog pole select
option (register 14) allows the user to select the position of the filter pole for the line input and output.
serial interface
The serial interface is designed to provide glueless interface to the MCBSP port of a TMS320C54x or
TMS320C6x DSP. This interface is used primarily for transferring ADC and DAC data. However, control register
information also can be transferred; refer to register programming using the serial interface. The serial interface
is a four-line interface, consisting of the following:
D BCLK: the bit clock used to transmit and receive data bits
D FSYNC: the frame-sync signal that denotes the start of a new frame of data
D DOUT: the output serial data used to transfer ADC data and register information to the attached DSP
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