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参数资料
| 型号： | TLV320AIC22PTR |
| 厂商： | Texas Instruments, Inc. |
| 元件分类： | Codec |
| 英文描述： | DUAL VOIP CODEC |
| 中文描述： | 双VoIP编解码器 |
| 文件页数： | 15/55页 |
| 文件大小： | 763K |
| 代理商： | TLV320AIC22PTR |
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TLV320AIC22
DUAL VOIP CODEC
SLAS281B – JULY 2000 – REVISED JUNE 2002
22
POST OFFICE BOX 655303
DALLAS, TEXAS 75265
detailed description (continued)
control register address and data
When the I2C/SPI pin is tied to a logic low, the serial interface is selected for controlling the device. Control
information is sent and received in time slots 0 and 1. An active-high pulse on the FSYNC pin indicates the start
of a frame. The structure of time slots 0 and 1 is shown in Figures 5 and 6. Bit 15 (the MSB) is transmitted or
received first. Transmitted data is sent on the rising edge of BCLK and data being received is latched on the
falling edge of BCLK.
Time slot 0 indicates:
D If a read or write operation is occurring
D Which device is being accessed
D The register address within the device being accessed
AD0 (LSB) and AD1 (MSB) form the device address. Up to four TLV320AIC22 devices can be addressed, with
addresses ranging from 0 to 3. The five LSBs in time slot 0 are unused.
Slot 0:
B15
Read/write control
1 = Write, 0 = Read
B14
AD1 device address bit (MSB)
B13
AD0 device address bit (LSB)
B12–B5
Register address (8 bits)
B4–B0
Unused
0
1
87
6
5
4
3
2
10
11
12
13
14
15
9
R/W
AD1
AD0
Register Address
Unused
MSB
LSB
NOTE: The register address is the binary equivalent of the register number
Figure 5. Bit Assignment and Definition for Slot-0 Word
If bit 15 in slot 0 is a 1, a write operation has been requested by the DSP. The DSP drives data onto the DIN
pin in the next time slot (time slot 1) as follows:
D The 8 bits of data to be written into the register appear on the first 8 bits, with the MSB appearing first.
D The next 8 bits (8 LSBs) are unused.
If bit 15 in slot 0 is a 0 a read operation has been requested. The TLV320AIC22 compares the values of the
device address bits, bits 14 and 13 of time slot 0 (AD1 and AD0 bits) to the configuration of the AD1 and AD0
pins on the device to determine if it is the device being addressed. The device drives data on DOUT if it is the
addressed device, as follows:
D The 8 bits of data from the addressed register appear in the first 8 bits, with the MSB appearing first.
D The next 8 bits (8 LSBs) are unused.
Slot 1:
B15–B8
Control register data
B7–B0
Unused
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