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| 型号： | TMS320VC5409PGE-80 |
| 厂商： | Texas Instruments |
| 文件页数： | 11/93页 |
| 文件大小： | 0K |
| 描述： | IC FIXED POINT DSP 144-LQFP |
| 标准包装： | 60 |
| 系列： | TMS320C54x |
| 类型： | 定点 |
| 接口： | 主机接口，McBSP |
| 时钟速率： | 80MHz |
| 非易失内存： | ROM（32 kB） |
| 芯片上RAM： | 64kB |
| 电压 - 输入/输出： | 3.30V |
| 电压 - 核心： | 1.80V |
| 工作温度： | -40°C ~ 100°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 144-LQFP |
| 供应商设备封装： | 144-LQFP（20x20） |
| 包装： | 托盘 |
| 配用： | 296-15829-ND - DSP STARTER KIT FOR TMS320C5416 |
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Introduction
19
April 1999 Revised October 2008
SPRS082F
Table 22. Terminal Functions (Continued)
TERMINAL
NAME
DESCRIPTION
I/O
INTERNAL
TERMINAL
NAME
DESCRIPTION
I/O
PIN STATE
HOST-PORT INTERFACE SIGNALS (CONTINUED)
HCNTL0
HCNTL1
Pullup
resistor
I
Control. HCNTL0 and HCNTL1 select a host access to one of the three HPI registers. The control
inputs have internal pullup resistors that are only enabled when HPIENA = 0.
HBIL
Pullup
resistor
I
Byte identification. HBIL identifies the first or second byte of transfer. The HBIL input has an internal
pullup resistor that is only enabled when HPIENA = 0.
HCS
Schmitt
trigger/pullup
resistor
I
Chip select. HCS is the select input for the HPI and must be driven low during accesses. The
chip-select input has an internal pullup resistor that is only enabled when HPIENA = 0.
HDS1
HDS2
Schmitt
trigger/pullup
resistor
I
Data strobe. HDS1 and HDS2 are driven by the host read and write strobes to control transfers. The
strobe inputs have internal pullup resistors that are only enabled when HPIENA = 0.
HAS
Schmitt
trigger/pullup
resistor
I
Address strobe. Hosts with multiplexed address and data pins require HAS to latch the address in
the HPIA register. HAS has an internal pullup resistor that is only enabled when HPIENA = 0.
HR/W
Pullup
resistor
I
Read/write. HR/W controls the direction of an HPI transfer. R/W has an internal pullup resistor that
is only enabled when HPIENA = 0.
HRDY
O/Z
Ready. The ready output informs the host when the HPI is ready for the next transfer. HRDY goes
into the high-impedance state when OFF is low.
HINT
O/Z
Interrupt. This output is used to interrupt the host. When the DSP is in reset, HINT is driven high
.
The signal goes into the high-impedance state when OFF is low.
HPIENA
Pulldown
resistor
I
HPI module select. HPIENA must be driven high during reset to enable the HPI. An internal
pulldown resistor is always active and the HPIENA pin is sampled on the rising edge of RS. If
HPIENA is left open or is driven low during reset, the HPI module is disabled. Once the HPI is
disabled, the HPIENA pin has no effect until the 5409 is reset.
HPI16
Pulldown
resistor
I
HPI 16-bit select pin (internal pulldown, default HPI8). HPI16 = 1 selects the non-multiplexed mode.
The non-multiplexed mode allows hosts with separate address/data buses to access the HPI
address range via the 16 address pins (A15–A0). 16-bit data is also accessible through pins D0
through D15. Host-to-DSP and DSP-to-Host interrupts are not supported. There are no HPIC and
HPIA register accesses in the non-multiplexed mode.
The HPI16 pin is sampled at RESET. The user should never change the value of the HPI16 pin while
the RESET signal is HIGH.
SUPPLY PINS
CVDD
S
+VDD. Dedicated 1.8-V power supply for the core CPU
DVDD
S
+VDD. Dedicated 3.3-V power supply for the I/O pins
VSS
S
Ground
I = Input, O = Output, Z = High-impedance, S = Supply
Although this pin includes an internal pulldown resistor, a 470- external pulldown is required. If the TRST pin is connected to multiple DSPs,
a buffer is recommended to ensure the VIL and VIH specifications are met.
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