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| 型号： | TPS51020EVM-001 |
| 厂商： | Texas Instruments |
| 文件页数： | 12/28页 |
| 文件大小： | 0K |
| 描述： | EVAL MODULE FOR TPS51020-001 |
| 标准包装： | 1 |
| 主要目的： | DC/DC，步降 |
| 输出及类型： | 2，非隔离 |
| 输出电压： | 3.3V，5V |
| 电流 - 输出： | 6A，6A |
| 输入电压： | 8 ~ 20 V |
| 稳压器拓扑结构： | 降压 |
| 频率 - 开关： | 300kHz |
| 板类型： | 完全填充 |
| 已供物品： | 板 |
| 已用 IC / 零件： | TPS51020 |
| 产品目录页面： | 1028 (CN2011-ZH PDF) |
| 相关产品： | TPS51020DBTRG4-ND - IC DUAL DC/DC SYNC CTRLR 30TSSOP 296-26971-2-ND - IC DUAL DC/DC SYNC CTRLR 30TSSOP TPS51020DBTG4-ND - IC DUAL DC/DC SYNC CTRLR 30TSSOP 296-15896-5-ND - IC DUAL DC/DC CTRLR SYNC 30TSSOP |
| 其它名称： | 296-18958 |
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TPS51020
SLUS564C ? JULY 2003 ? REVISED OCTOBER 2008
APPLICATION INFORMATION
5-V LINEAR REGULATOR (VREG5)
The VREG5 voltage is the bias for all the low voltage circuitry in the TPS51020 as well as the DC boost voltage
for the MOSFET gate drivers. Total available current is 60 mA. Bypass this pin to GND by 4.7- μ F. The under
voltage lockout (UVLO) circuit monitors the output of this regulator to protect internal circuitry from low input
voltages. If 5 V is applied to REG5_IN from either the SMPS output or an alternate 5 V, then the linear regulator
is turned off and the VREG5 pin is switched over to REG_IN. This operation enhances the efficiency of the
overall power supply system because the bulk of the quiescent current now runs from the 5-V output instead
of VIN (VBAT). In this configuration, ensure that VREG5_IN is less than or equal to V VIN .
EXTERNAL 5V INPUT (REG5_IN)
When a 5-V bus is available, VIN does not need to be connected to the battery. In this configuration, VIN should
be connected to REG5_IN.
LOW-SIDE N-CHANNEL FET DRIVER
The low-side driver is designed to drive high current low R DS(on) N-channel MOSFET(s). The maximum drive
voltage is 5.5 V. The drive capability is represented by its internal resistance, which are 3 ? for VREG5 to
OUTx_D and 2.5 ? for OUTx_D to OUTGNDx. A dead time is internally generated between top MOSFET off
to bottom MOSFET on, and bottom MOSFET off to top MOSFET on, in order to prevent shoot through.
The low-side driver is typically turned off during all fault modes except for OVP. When an OVP condition exists,
the low-side driver of the offending channel turns on and attempts to blow the protection fuse of the input supply.
HIGH-SIDE N-CHANNEL FET DRIVER
The high-side driver is designed to drive high current, low R DS(on) N-channel MOSFET(s). When configured as
a floating driver, a 5-V bias voltage is delivered from VREG5 supply. The instantaneous drive current is supplied
by the flying capacitor between VBSTx and LLx pins, 0.1- μ F ceramic for typical applications. The boost diodes
are integrated and are sufficient for enhancing the high-side MOSFET. However, external boost diodes can also
be added from VREG5 to each VBSTx in case higher gate-to-source votlage is required.
The drive capability is represented by its internal resistance, which are as follows: 3 ? for VBST to OUTx_U
and 2.5 ? for OUTx_U to LLx. The maximum voltage that can be applied between OUTx_U pin and OUTGNDx
pin is 35 V.
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