参数资料
型号: TPS51020EVM-001
厂商: Texas Instruments
文件页数: 4/28页
文件大小: 0K
描述: EVAL MODULE FOR TPS51020-001
标准包装: 1
主要目的: DC/DC,步降
输出及类型: 2,非隔离
输出电压: 3.3V,5V
电流 - 输出: 6A,6A
输入电压: 8 ~ 20 V
稳压器拓扑结构: 降压
频率 - 开关: 300kHz
板类型: 完全填充
已供物品:
已用 IC / 零件: TPS51020
产品目录页面: 1028 (CN2011-ZH PDF)
相关产品: TPS51020DBTRG4-ND - IC DUAL DC/DC SYNC CTRLR 30TSSOP
296-26971-2-ND - IC DUAL DC/DC SYNC CTRLR 30TSSOP
TPS51020DBTG4-ND - IC DUAL DC/DC SYNC CTRLR 30TSSOP
296-15896-5-ND - IC DUAL DC/DC CTRLR SYNC 30TSSOP
其它名称: 296-18958
TPS51020
SLUS564C ? JULY 2003 ? REVISED OCTOBER 2008
ELECTRICAL CHARACTERISTICS (continued)
TA = ?40 ° C to 85 ° C, 4.5 V < VIN < 20 V, CVIN = 0.1 μ F, CVREG5 = 2.2 μ F, CREF_X = 0.01 μ F, PGOOD = 0.2 V, ENBLx = DDR = VIN,
INVx = COMPx, RSSTRTx = OPEN, TRIP1 = TRIP2 = VIN, LLx = GND, VBSTx = LLx+5, C(OUTx_U, OUTx_D)=1 nF, REG5_IN = 0V, GND =
OUTGNDx = 0 V, VO1_VDDQ = VO2 = 0 V (unless otherwise stated)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNIT
REF_X REFERENCE VOLTAGE
VREF10
VLD10
10-V reference voltage
Load regulation
VIN = 14 V,
0 mA ≤ IOUT ≤ 2 mA,
IOUT = 0 A
VIN = 18 V
8.5
10.0
-12%
11.0
-20%
V
VLN10
VREFVTT
VREFVTT
Line regulation
VTT reference voltage
VTT reference load regulation
IOU   T = 100 μ A,             14 V VIN 28 V
DDR = 0 V wrt VO1_VDDQ input divided by 2
VVO1 = 2.5 V
0 mA ≤ IO ≤ 3 mA
5%
1.5%
0.75%
POWERGOOD COMPARATORS
Undervoltage PGOOD
765
786
808
VTHDUAL(PG) PGOOD threshold (dual mode)
VTHDDR(PG) PGOOD threshold (DDR)
Overvoltage PGOOD
Undervoltage PGOOD,
VO1_VDDQ = 2.5 V
Overvoltage PGOOD,
VO1_VDDQ = 2.5 V
892
1.12
1.28
920
1.14
1.31
945
1.16
1.33
mV
V
INVx > undervoltage PGOOD,
TPG(del)
PGOOD delay time
Delay time from SSTRTx > 1.5 V to PGOOD
2048
clks
going high
DIGITAL CONTROL INPUTS
VIH
VIL
IINLEAK
High-level input voltage, logic
Low-level input voltage, logic
Logic input leakage current
DDR, ENBL1, ENBL2, SKIP
DDR, ENBL1, ENBL2, SKIP
DDR, ENBL1, ENBL2, SKIP= 5 V
2.2
0.3
|1.0|
V
μ A
VO1_VDDQ and VO2
RVOUT
VOx sink impedance
VVOUTx = 0.5 V, fault engaged
6
10
?
VVOUTOK
VVO2LEAK
RVOUT
VOx low restart voltage
VOx input leakage current
VO1_VDDQ input impedance
Fault condition removed, restart
DDR= VIN,
VOx = 5 V
DDR= 0
0.25
0.32
1.5
0.40
|1.0|
V
μ A
M ?
UNDERVOLTAGE AND OVERVOLTAGE PROTECTION
VOVPDUAL
VOVPDDR
OVP trip output threshold (dual)
OVP trip output threshold (DDR)
Sensed at INVx
VO1_VDDQ = 2.5 V
945
1.31
970
1.36
1010
1.41
mV
V
TOVP(del)
OVP propagation delay time(1)
20
μ s
VUVPDUAL
VUVPDDR
UVP trip output threshold (dual)
UVP trip output threshold (DDR)
Sensed at INVx
VO1_VDDQ = 2.5 V
510
750
553
813
595
875
mV
TUVP(del)
UVP propagation delay time
4096
clks
OVERCURRENT and INPUT VOLTAGE UVLO PROTECTION
ITRIPSNK
ITRIPSRC
TRIPx sink current
TRIPx source current
VTRIPx = VIN ? 100 mV,
VTRIPx = 100 mV,
TA = 25 ° C
TA = 25 ° C
11
10
13
13
15
16
μ A
TCITRIP
TRIP current temperature coeficient(1)
TA = 25 ° C
4200
ppm/
° C
VOCPHI
VOCPLO
High-level OCP comparator offset voltage(1)
Low-level OCP comparator offset voltage(1)
0
0
|3.0|
|5.0|
mV
VVINUVLO
VVINHYS
VIN UVLO trip threshold
VIN UVLO trip hysteresis
REF5V_IN = 4.8 V
3.7
100
3.9
200
4.1
300
V
mV
4
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