SLVSA76F
– MARCH 2010 – REVISED FEBRUARY 2011
TPS65181/TPS65181B TMST_VALUE register. To support these systems the TPS65181/TPS65181B
automatically triggers temperature acquisition every 60s (for other acquisition intervals contact the factory) and
stores the result in TMST_VALUE register. With the FIX_RD_PTR bit in the FIX_RD_POINTER register set to 1
the device will respond to any I2C read command with data from the TMST_VALUE register. No write command
with the register address is required and address auto increment feature is disabled in this mode. Therefore
reading the temperature data is reduced to two steps:
1. Send device address, R/nW set high (read command).
2. Read the data from the slave. The slave will respond with data from TMST_VALUE register address.
Write functionality is not affected by the FIX_RD_PTR bit and the main controller in the system maintains full
control of the PMIC. Interrupts and error flags are issued and need to be handled the same way as for the
TPS65180/TPS65180B with two exceptions:
1. The FIX_RD_PTR bit in the FIX_RD_POINTER register needs to be set to 0 before the main controller can
read any register different from the TMST_VALUE register.
2. Thermal shutdown (TSD), positive boost under voltage (VB_UV), inverting buck-boost under voltage
(VN_UV), and input under voltage lock out (UVLO) interrupt bits do not have to be cleared before output rails
can be re-enabled.
At system power-up the main processor sets up the PMIC by accessing the I2C registers and setting the control
parameters as needed. When the system is setup correctly the main controller sets the FIX_READ_POINTER bit
and the display controller can start accessing the temperature information. During normal operation the main
controller can write to the PMIC at any time but before it can read access registers the FIX_READ_POINTER bit
must be written 0.
The
temperature
range
and
representation
of
the
temperature
data
is
the
same
between
the
TPS65180/TPS65180B and TPS65181/TPS65181B.
THE FIX_RD_PTR BIT
The TPS65181/TPS65181B supports a special I2C mode making it compatible with the EPSON Broadsheet
S1D13521 timing controller. Standard I2C protocol requires the following steps to read data from a register:
1. Send device slave address, R/nW bit set low (write command)
2. Send register address
3. Send device slave address, R/nW set high (read command)
4. The slave will respond with data from the specified register address.
The EPSON Broadsheet S1D13521 controller does not support I2C writes nor I2C reads from addressed
registers (step 1. and 2. above) but needs to access the temperature data from the TPS65181/TPS65181B
’s
TMST_VALUE register. To support Broadsheet based systems, the TPS65181/TPS65181B automatically
triggers temperature acquisition every 60s and stores the result in TMST_VALUE register. With the FIX_RD_PTR
bit in the FIX_RD_POINTER register set to 1 the device will respond to any I2C read command with data from
the TMST_VALUE register. No write command with the register address is required and address auto increment
feature is disabled in this mode. Therefore reading the temperature data is reduced to two steps:
1. Send device address, R/nW set high (read command)
2. Read the data from the slave. The slave will respond with data from TMST_VALUE register address.
Write functionality is not affected by the FIX_RD_PTR bit and the main controller in the system maintains full
control of the PMIC. Interrupts and error flags are issued and need to be handled the same way as for the
TPS65180/TPS65180B with two exceptions:
1. The FIX_RD_PTR bit in the FIX_RD_POINTER register needs to be set to 0 before the main controller can
read any register different from the TMST_VALUE register.
2. Thermal Shutdown (TSD), positive boost Under Voltage (VB_UV), inverting buck-boost Under Voltage
(VN_UV), and input Under Voltage Lock Out (UVLO) interrupt bits do not have to be cleared before output
rails can be re-enabled.
2010–2011, Texas Instruments Incorporated
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