- 您现在的位置：买卖IC网 > PDF目录199467 > TPS65181RGZR (TEXAS INSTRUMENTS INC) POWER SUPPLY MANAGEMENT CKT, PQCC48 PDF资料下载
参数资料
| 型号： | TPS65181RGZR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQCC48 |
| 封装： | 7 X 7 MM, 0.90 MM HEIGHT, GREEN, PLASTIC, VQFN-48 |
| 文件页数： | 4/41页 |
| 文件大小： | 892K |
| 代理商： | TPS65181RGZR |
第1页第2页第3页当前第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页
SLVSA76F
– MARCH 2010 – REVISED FEBRUARY 2011
GPIO CONTROL
Under GPIO control the system host in E Ink Vizplex
panel module enables the TPS65180/TPS65181 and
TPS65180B/TPS65181B output rails by asserting the PWR0, PWR1, PWR2, PWR3 signals and the host has full
control over the order and timing in which the output rails are powered up and down. Rails are in regulation 2 ms
after their respective PWRx pin has been asserted with the exception of the first rail, which takes 6 ms to power
up. The additional time is needed to power up the positive and inverting buck-boost regulator which need to be
turned on before any other rail can be enabled. Once all rails are enabled and in regulation the PWR_GOOD pin
is
released
(pin status = HiZ and power good line is pulled high by external pull-up resistor). The PWRx pins are assigned to
the rails as follows:
PWR0: LDO2 (VNEG) and VCOM
PWR1: CP2 (VEE)
PWR2: LDO2 (VPOS)
PWR3: CP1 (VDDH)
Rails are powered down whenever the host de-asserts the respective PWRx pin, and once all rails are disabled
the device enters STANDBY mode. The next step is then to de-assert the WAKEUP pin to enter SLEEP mode
which is the lowest-power mode of operation.
It is possible for the host to force the TPS65180/TPS65181 and TPS65180B/TPS65181B directly into SLEEP
mode from ACTIVE mode by de-asserting the WAKEUP pin in which case the device follows the power-down
sequence defined by the PWR_SEQx registers before entering SLEEP mode.
I
2C CONTROL
Under I2C control the power-up sequence is defined by the PWR_SEQx registers rather than through GPIO
control. In SLEEP mode the TPS65180/TPS65181 and TPS65180B/TPS65181B are completely turned off, the
I2C registers are reset, and the device does not accept any I2C transaction. Pull the WAKEUP pin high while all
PWRx pins are held low and the device will enter STANDBY mode which enables the I2C interface. Write to the
PWR_SEQ0 register to define the order in which the output rails will be enabled at power-up and to the
PWR_SEQ1 and PWR_SEQ2 registers to define the power-up delays between rails. Finally, set the ACTIVE bit
in the ENABLE register to 1 to execute the power-up sequence and bring up all power rails.
It is possible for the host to force the TPS65180/TPS65181 and TPS65180B/TPS65181B directly into ACTIVE
mode from SLEEP mode by pulling the WAKEUP pin high while at least one of the PWRx pins is pulled high. In
this case the default power-up sequence defined by the PWR_SEQx registers applies and the device will start
powering up the rails 5.5 ms after the WAKEUP signal has been pulled high.
To power-down the device, set the STANDBY bit of the ENABLE register to 1 then the TPS65180/TPS65181 and
TPS65180B/TPS65181B will follow the reverse power-up sequence to bring down all power rails. While the
sequencer is busy powering up the power rails, any activity on the PWRx pins is ignored. Once all rails are up,
any of the output rails can be disabled by applying a negative edge on the PWRx input pins, i.e. if the host
toggles the PWRx pin high-low or low-high-low, the respective rail will be disabled regardless of how it has been
enabled.
12
2010–2011, Texas Instruments Incorporated
相关PDF资料 |
PDF描述 |
|---|---|
| TPS721A | FIBER OPTIC PHOTODIODE DETECTOR, THROUGH HOLE MOUNT |
| TPS793285DBVRQ1 | 2.85 V FIXED POSITIVE LDO REGULATOR, 0.2 V DROPOUT, PDSO5 |
| TPSMA11A/5A | 400 W, UNIDIRECTIONAL, SILICON, TVS DIODE, DO-214AC |
| TPSMA15A/5A | 400 W, UNIDIRECTIONAL, SILICON, TVS DIODE, DO-214AC |
| TPSMB33/5 | 600 W, UNIDIRECTIONAL, SILICON, TVS DIODE, DO-214AA |
相关代理商/技术参数 |
参数描述 |
|---|---|
| TPS65181RGZT | 功能描述:LCD Gamma缓冲器 Pwr Mgmt IC for Elec Paper Display RoHS:否 制造商:Maxim Integrated 输入补偿电压: 转换速度: 电源电压-最大:20 V 电源电压-最小:9 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-38 封装:Tube |
| TPS65182BRGZR | 功能描述:LCD Gamma缓冲器 PMIC for E Ink Vizplex RoHS:否 制造商:Maxim Integrated 输入补偿电压: 转换速度: 电源电压-最大:20 V 电源电压-最小:9 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-38 封装:Tube |
| TPS65182BRGZT | 功能描述:LCD Gamma缓冲器 PMIC for E Ink Vizplex RoHS:否 制造商:Maxim Integrated 输入补偿电压: 转换速度: 电源电压-最大:20 V 电源电压-最小:9 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-38 封装:Tube |
| TPS65182RGZR | 功能描述:LCD Gamma缓冲器 Pwr Mgt IC for E Ink Vizplex RoHS:否 制造商:Maxim Integrated 输入补偿电压: 转换速度: 电源电压-最大:20 V 电源电压-最小:9 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-38 封装:Tube |
| TPS65182RGZT | 功能描述:LCD Gamma缓冲器 Pwr Mgt IC for E Ink Vizplex RoHS:否 制造商:Maxim Integrated 输入补偿电压: 转换速度: 电源电压-最大:20 V 电源电压-最小:9 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-38 封装:Tube |
发布紧急采购，3分钟左右您将得到回复。