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参数资料
| 型号： | TPS65181RGZR |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 电源管理 |
| 英文描述： | POWER SUPPLY MANAGEMENT CKT, PQCC48 |
| 封装： | 7 X 7 MM, 0.90 MM HEIGHT, GREEN, PLASTIC, VQFN-48 |
| 文件页数： | 2/41页 |
| 文件大小： | 892K |
| 代理商： | TPS65181RGZR |
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SLVSA76F
– MARCH 2010 – REVISED FEBRUARY 2011
MODES OF OPERATION
The TPS65180/TPS65181 and TPS65180B/TPS65181B have three modes of operation, SLEEP, STANDBY, and
ACTIVE. SLEEP mode is the lowest-power mode in which all internal circuitry is turned off. In STANDBY, all
power rails are shut down but the device is ready to accept commands through PWR[3:0] pins and/or I2C
interface. In ACTIVE mode one or more power rails are enabled.
SLEEP
This is the lowest power mode of operation. All internal circuitry is turned off, registers are
reset to default values and the device does not respond to I2C communications.
TPS65180/TPS65181 and TPS65180B/TPS65181B enter SLEEP mode whenever WAKEUP
pin is pulled low.
STANDBY
In STANDBY all internal support circuitry is powered up and the device is ready to accept
commands either through GPIO or I2C control but none of the power rails are enabled. To
enter STANDBY mode the WAKEUP pin must be pulled high and all PWRx pins must be
pulled low or the STANDBY bit of the ENABLE register must be set high. The device also
enters STANDBY mode if input under voltage lock out (UVLO), positive boost under voltage
(VB_UV), or inverting buck-boost under voltage (VN_UV) is detected, or thermal shutdown
occurs.
ACTIVE
The device is in ACTIVE mode when any of the output rails are enabled and no fault
condition is present. This is the normal mode of operation while the device is powered up. In
ACTIVE mode, a falling edge on any PWRx pin shuts down and a rising edge powers up the
corresponding rail.
MODE TRANSISITONS
SLEEP
→ ACTIVE
WAKEUP pin is pulled high (rising edge) with any PWRx pin high. Rails come up in the order
defined by the PWR_SEQx registers.
SLEEP
→ STANDBY
WAKEUP pin is pulled high (rising edge) with all PWRx pins low. Rails will remain down until
one or more PWRx pin is pulled high.
ACTIVE
→ SLEEP
WAKEUP pin is pulled low (falling edge). Rails are shut down in the reverse power-up order
defined by PWR_SEQ registers.
ACTIVE
→ STANDBY
WAKEUP pin is high. All PWRx pins are pulled low (falling edge). Rails shut down in the
order in which PWRx pins are pulled low. In the event of thermal shut down (TSD), under
voltage lock out (UVLO), positive boost or inverting buck-boost under voltage (UV), or when
STANDBY bit is set to 1, the device shuts down all rails in the reverse power-up order
defined by the PWR_SEQx registers.
STANDBY
→ ACTIVE
WAKEUP pin is high and any PWRx pin is pulled high (rising edge). Rails come up in the
same order as PWRx pins are pulled high. Alternatively, if ACTIVE bit is set to 1, output rails
will power up in the order defined by the PWR_SEQx registers.
STANDBY
→ SLEEP
WAKEUP pin is pulled low (falling edge) while none of the output rails are enabled.
10
2010–2011, Texas Instruments Incorporated
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| TPS65182RGZT | 功能描述:LCD Gamma缓冲器 Pwr Mgt IC for E Ink Vizplex RoHS:否 制造商:Maxim Integrated 输入补偿电压: 转换速度: 电源电压-最大:20 V 电源电压-最小:9 V 电源电流: 最大功率耗散: 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:TQFN-38 封装:Tube |
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