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| 型号： | TSB43AA82PGE |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP144 |
| 封装： | PLASTIC, QFP-144 |
| 文件页数： | 32/146页 |
| 文件大小： | 770K |
| 代理商： | TSB43AA82PGE |
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115
Table 113. Page-0 (Port Status) Register Configuration
Address
Bit Position
Address
0
1
2
3
4
5
6
7
1000
AStat
Bstat
Ch
Con
Bias
Dis
1001
Peer_Speed
PIE
Fault
Reserved
1010
Reserved
1011
Reserved
1100
Reserved
1101
Reserved
1110
Reserved
1111
Reserved
Table 114. Page-0 (Port Status) Register Field Descriptions
FIELD
SIZE
TYPE
DESCRIPTION
AStat
2
R
TPA line state. This field indicates the TPA line state of the selected port, encoded as follows:
Code
Line State
11
Z
01
1
10
0
00
Invalid
Bstat
2
R
TPB line state. This field indicates the TPB line state of the selected port. This field has the same encoding as
the AStat field.
Ch
1
R
Child/parent status. A 1 indicates that the selected port is a child port. A 0 indicates that the selected port is the
parent port. A disconnected, disabled, or suspended port is reported as a child port. The Ch bit is invalid after a
bus reset until tree-ID has completed.
Con
1
R
Debounced port connection status. This bit indicates that the selected port is connected. The connection must
be stable for the debounce time of approximately 341 ms for the Con bit to be set to 1. The Con bit is reset to 0
by a hardware reset and is unaffected by a bus reset.
Note: The Con bit indicates that the port is physically connected to a peer PHY, but the port is not necessarily
active.
Bias
1
R
Debounced incoming cable bias status. A 1 indicates that the selected port is detecting incoming cable bias.
The incoming cable bias must be stable for the debounce time of 52
s for the bias bit to be set to 1.
Dis
1
R/W
Port disabled control. If 1, the selected port is disabled. The Dis bit is reset to 0 by a hardware reset (all ports
are enabled for normal operation following hardware reset). The Dis bit is not affected by a bus reset.
Peer_Speed
3
R
Port peer speed. This field indicates the highest speed capability of the peer PHY connected to the selected
port, encoded as follows:
Code
Peer Speed
000
S100
001
S200
010
S400
011–111 Invalid
The Peer_Speed field is invalid after a bus reset until self-ID has completed.
Note: Peer speed codes higher than 010b (S400) are defined in P1394a. However, the TSB43AA82 is only
capable of detecting peer speeds up to S400.
PIE
1
R/W
Port event interrupt enable. When set to 1, a port event on the selected port sets the port event interrupt (PEI)
bit and notify the link. This bit is reset to 0 by a hardware reset and is unaffected by a bus reset.
Fault
1
R/W
Fault. This bit indicates that a resume fault or suspend fault has occurred on the selected port and that the port
is in the suspended state. A resume fault occurs when a resuming port fails to detect incoming cable bias from
its attached peer. A suspend fault occurs when a suspending port continues to detect incoming cable bias from
its attached peer. Writing 1 to this bit clears the fault bit to 0. This bit is reset to 0 by a hardware reset and is
unaffected by a bus reset.
The vendor identification page is used to identify the vendor/manufacturer and compliance level. The page is selected
by writing 1 to the Page_Select field in base register 7. The configuration of the vendor identification page is shown
in Table 115, and corresponding field descriptions given in Table 116.
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