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参数资料
| 型号： | TSB43AA82PGE |
| 厂商： | TEXAS INSTRUMENTS INC |
| 元件分类： | 微控制器/微处理器 |
| 英文描述： | 2 CHANNEL(S), 400M bps, SERIAL COMM CONTROLLER, PQFP144 |
| 封装： | PLASTIC, QFP-144 |
| 文件页数： | 55/146页 |
| 文件大小： | 770K |
| 代理商： | TSB43AA82PGE |
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16
1.4.3
Physical Layer (continued)
TERMINAL
I/O
DESCRIPTION
NAME
PGE NO.
GGW NO.
I/O
DESCRIPTION
TPA1N
TPA1P
95
96
G17
G16
I/O
Twisted-pair cable-A differential signal terminals. Board traces from each pair of positive
and negative differential signal terminals must match and be kept as short as possible to
TPA1N
TPA1P
95
96
G17
G16
I/O
Twisted-pair cable-A differential signal terminals. Board traces from each pair of positive
and negative differential signal terminals must match and be kept as short as possible to
the external load resistors and to the cable connector.
TPA2N
TPA2P
106
107
C17
C16
I/O
and negative differential signal terminals must match and be kept as short as possible to
the external load resistors and to the cable connector.
TPA2N
TPA2P
106
107
C17
C16
I/O
TPB1N
TPB1P
91
92
J17
J16
I/O
Twisted-pair cable-B differential signal terminals. Board traces from each pair of positive
and negative differential signal terminals must match and be kept as short as possible to
TPB1N
TPB1P
91
92
J17
J16
I/O
Twisted-pair cable-B differential signal terminals. Board traces from each pair of positive
and negative differential signal terminals must match and be kept as short as possible to
the external load resistors and to the cable connector.
TPB2N
TPB2P
102
103
E17
E16
I/O
and negative differential signal terminals must match and be kept as short as possible to
the external load resistors and to the cable connector.
TPB2N
TPB2P
102
103
E17
E16
I/O
TPBIAS1
TPBIAS2
97
108
G15
B17
O
Twisted pair bias output. This provides the 1.86-V nominal bias voltage needed for
proper operation of the twisted-pair cable drivers and receivers, and for signaling to the
remote nodes that there is an active cable connection. Each of these terminals, except
for an unused port, must be decoupled with a 1.0-
F capacitor to ground. For the
unused port, this terminal can be left unconnected.
XI
XO
115
116
A13
A12
I
—
Crystal oscillator inputs. These terminals connect to a 24.576-MHz parallel resonant
fundamental mode crystal. The optimum values for the external shunt capacitors are
XO
116
A12
—
fundamental mode crystal. The optimum values for the external shunt capacitors are
dependent on the specifications of the crystal used.
Port 1 is not recommended for use in the GHH package.
1.4.4
Test Interface
TERMINAL
I/O
DESCRIPTION
NAME
PGE NO.
GGW NO.
I/O
DESCRIPTION
TEST[7:0]
129, 127, 125,
124, 122, 121,
120, 119
C8, A8, C9,
A9, C10, A10,
A11, B11
I/O
Test data lines. The test data lines are used in manufacturing test and is tied low in
normal/operational mode.
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