参数资料
型号: uPSD3212
厂商: 意法半导体
英文描述: Flash Programmable System Device with 8032 Microcontroller Core(嵌入高速“8032微控制器核”的Flash型可编程系统器件)
中文描述: 闪存可编程系统器件与8032微控制器内核(嵌入高速“8032微控制器核”的闪存型可编程系统器件)
文件页数: 44/155页
文件大小: 1055K
代理商: UPSD3212
μPSD321X
44/155
I/O PORTS (MCU MODULE)
The MCU Module has five ports: Port0, Port1,
Port2, Port3 and Port 4. (Refer to the PSD Module
section on I/O ports A,B,C and D). Ports P0 and
P2 are dedicated for the external address and data
bus and is not available in the 80 pin package de-
vices.
Port1 - Port3 are the same as in the standard 8032
micro-controllers, with the exception of the addi-
tional special peripheral functions. All ports are bi-
directional. Pins of which the alternative function is
not used may be used as normal bi-directional I/O.
The use of Port1- Port4 pins as alternative func-
tions are carried out automatically by the
μPSD321X Devices provided the associated SFR
Bit is set HIGH.
The following SFR registers (Tables 29, 30, and
31) are used to control the mapping of alternate
functions onto the I/O port bits. Port 1 alternate
functions are controlled using the P1SFS register,
except for Timer 2 and the 2nd UART which are
enabled by their configuration registers. P1.0 to
P1.3 are default to GPIO after reset.
Port 3 pins 6 and 7 have been modified from the
standard 8032. These pins that were used for
READ and WRITE control signals are now GPIO
or I
2
C bus pins. The READ and WRITE pins are
assigned to dedicated pins.
Port 3 and Port 4 alternate functions are controlled
using the P3SFS and P4SFS Special Function Se-
lection registers. After a reset, the I/O pins default
to GPIO. The alternate function is enabled if the
corresponding bit in the PXSFS register is set to
'1.'
Table 28. I/O Port Functions
Table 29. P1SFS (91H)
Table 30. P3SFS (93H)
Table 31. P4SFS (94H)
Port Name
Main Function
Alternate
Port 1
GPIO
Timer 2 - Bits 0,1
2nd UART - Bits 2,3
ADC - Bits 4..7
Port 3
GPIO
UART - Bits 0,1
Interrupt - Bits 2,3
Timers - Bits 4,5
I
2
C - Bits 6,7
Port 4
GPIO
PWM - Bits 3..7
7
6
5
4
3
2
1
0
0=Port 1.7
1=ACH3
0=Port 1.6
1=ACH2
0=Port 1.5
1=ACH1
0=Port 1.4
1=ACH0
Bits Reserved
Bits Reserved
7
6
5
4
3
2
1
0
0 = Port 1.7
1 = SCL
from I
2
C unit
0 = Port 1.6
1 = SDA
from I
2
C unit
Bits are reserved.
7
6
5
4
3
2
1
0
0=Port 4.7
1=PWM 4
0=Port 4.6
1=PWM 3
0=Port 4.5
1=PWM 2
0=Port 4.4
1=PWM 1
0=Port 4.3
1=PWM 0
0=Port 4.2
0=Port 4.1
0=Port 4.0
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