- 您现在的位置：买卖IC网 > PDF目录68428 > W25Q80BVZPAG (WINBOND ELECTRONICS CORP) 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 PDF资料下载
参数资料
| 型号： | W25Q80BVZPAG |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | PROM |
| 英文描述： | 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| 封装： | 6 X 5 MM, GREEN, WSON-8 |
| 文件页数： | 29/75页 |
| 文件大小： | 1055K |
| 代理商： | W25Q80BVZPAG |
第1页第2页第3页第4页第5页第6页第7页第8页第9页第10页第11页第12页第13页第14页第15页第16页第17页第18页第19页第20页第21页第22页第23页第24页第25页第26页第27页第28页当前第29页第30页第31页第32页第33页第34页第35页第36页第37页第38页第39页第40页第41页第42页第43页第44页第45页第46页第47页第48页第49页第50页第51页第52页第53页第54页第55页第56页第57页第58页第59页第60页第61页第62页第63页第64页第65页第66页第67页第68页第69页第70页第71页第72页第73页第74页第75页
W25Q80BV
Publication Release Date: October 06, 2010
- 35 -
Revision D
9.2.17 Octal Word Read Quad I/O (E3h)
The Octal Word Read Quad I/O (E3h) instruction is similar to the Fast Read Quad I/O (EBh) instruction
except that the lower four Address bits (A0, A1, A2, A3) must equal 0. As a result, the dummy clocks are
not required, which further reduces the instruction overhead allowing even faster random access for code
execution (XIP). The Quad Enable bit (QE) of Status Register-2 must be set to enable the Octal Word
Read Quad I/O Instruction.
Octal Word Read Quad I/O with “Continuous Read Mode”
The Octal Word Read Quad I/O instruction can further reduce instruction overhead through setting the
“Continuous Read Mode” bits (M7-0) after the input Address bits (A23-0), as shown in figure 16a. The
upper nibble of the (M7-4) controls the length of the next Octal Word Read Quad I/O instruction through
the inclusion or exclusion of the first byte instruction code. The lower nibble bits of the (M3-0) are don’t
care (“x”). However, the IO pins should be high-impedance prior to the falling edge of the first data out
clock.
If the “Continuous Read Mode” bits M5-4 = (1,0), then the next Fast Read Quad I/O instruction (after /CS
is raised and then lowered) does not require the E3h instruction code, as shown in figure 16b. This
reduces the instruction sequence by eight clocks and allows the Read address to be immediately entered
after /CS is asserted low. If the “Continuous Read Mode” bits M5-4 do not equal to (1,0), the next
instruction (after /CS is raised and then lowered) requires the first byte instruction code, thus returning to
normal operation. A “Continuous Read Mode” Reset instruction can also be used to reset (M7-0) before
issuing normal instructions (See 9.2.20 for detail descriptions).
M7-0
/CS
CLK
Mode 0
Mode 3
0
1
IO
0
IO
1
IO
2
IO
3
2
3
4
5
20
16
12
8
21
17
22
18
23
19
13
9
14
10
15
11
A23-16
6
7
8
9
4
0
5
1
6
2
7
3
A15-8
A7-0
4
Byte 1
Byte 2
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
4
0
5
1
6
2
7
3
10
11
12
13
14
4
5
6
7
IOs switch from
Input to Output
Byte 3
15
16
17
18
19
20
21
Instruction (E3h)
4
0
5
1
6
2
7
3
Byte 4
Figure 16a. Octal Word Read Quad I/O Instruction Sequence (Initial instruction or previous M5-4
≠ 10)
相关PDF资料 |
PDF描述 |
|---|---|
| W25Q80BVSNIP | 8M X 1 SPI BUS SERIAL EEPROM, PDSO8 |
| W25X10AVDIAZ | 128K X 8 FLASH 2.7V PROM, PDIP8 |
| W25X16AVDAIG | 2M X 8 FLASH 2.7V PROM, PDIP8 |
| W25X16BVZPIG | 256K X 16 FLASH 2.7V PROM, PDSO8 |
| W25X20BLSNIG | 2M X 1 FLASH 2.7V PROM, PDSO8 |
相关代理商/技术参数 |
参数描述 |
|---|---|
| W25Q80BVZPAP | 制造商:WINBOND 制造商全称:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BVZPIG | 功能描述:IC SPI FLASH 8MBIT 8WSON RoHS:是 类别:集成电路 (IC) >> 存储器 系列:SpiFlash® 标准包装:1,000 系列:- 格式 - 存储器:EEPROMs - 串行 存储器类型:EEPROM 存储容量:4K (512 x 8) 速度:400kHz 接口:I²C，2 线串口 电源电压:2.7 V ~ 5.5 V 工作温度:-40°C ~ 85°C 封装/外壳:8-SOIC（0.173"，4.40mm 宽） 供应商设备封装:8-MFP 包装:带卷 (TR) |
| W25Q80BVZPIG TR | 制造商:Winbond Electronics Corp 功能描述:IC FLASH 8MBIT 104MHZ 8WSON |
| W25Q80BVZPIP | 制造商:WINBOND 制造商全称:Winbond 功能描述:8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
| W25Q80BW | 制造商:WINBOND 制造商全称:Winbond 功能描述:1.8V 8M-BIT SERIAL FLASH MEMORY WITH DUAL AND QUAD SPI |
发布紧急采购，3分钟左右您将得到回复。