参数资料
型号: W9412G2CB-5
厂商: WINBOND ELECTRONICS CORP
元件分类: DRAM
英文描述: 4M X 32 DDR DRAM, 0.6 ns, PBGA144
封装: 12 X 12 MM, 1.40 MM HEIGHT, ROHS COMPLIANT, LFBGA-144
文件页数: 10/49页
文件大小: 1936K
代理商: W9412G2CB-5
W9412G2CB
Publication Release Date:Jul. 07, 2008
- 18 -
Revision A11
8. OPERATION MODE
The following table shows the operation commands.
8.1 Simplified Truth Table
SYM.
COMMAND
DEVICE
STATE
CKEn-1
CKEn
DM
(4)
BA0,BA1
A8
A0-A7
A9-
A11
CS
RAS
CAS
WE
ACT
Bank Active
Idle
(3)
H
X
V
L
H
PRE
Bank Precharge
Any
(3)
H
X
V
L
X
L
H
L
PREA
Precharge All
Any
H
X
H
X
L
H
L
WRIT
Write
Active
(3)
H
X
V
L
V
L
H
L
WRITA
Write with Auto-
precharge
Active
(3)
H
X
V
H
V
L
H
L
READ
Read
Active
(3)
H
X
V
L
V
L
H
L
H
READA
Read with Auto-
precharge
Active
(3)
H
X
V
H
V
L
H
L
H
MRS
Mode Register Set
Idle
H
X
L, L
C
L
EMRS
Extended Mode
Register Set
Idle
H
X
H, L
V
L
NOP
No Operation
Any
H
X
L
H
BST
Burst Read Stop
Active
H
X
L
H
L
DSL
Device Deselect
Any
H
X
H
X
AREF
Auto Refresh
Idle
H
X
L
H
SELF
Self Refresh Entry
Idle
H
L
X
L
H
SELEX
H
X
Self Refresh Exit
Idle
(Self
Refresh)
L
H
X
L
H
X
PD
H
X
Power Down
Mode Entry
Idle/
Active
(5)
H
L
X
L
H
X
PDEX
H
X
Power Down
Mode Exit
Any
(Power
Down)
L
H
X
L
H
X
WDE
Data Write Enable
Active
H
X
L
X
WDD
Data Write Disable
Active
H
X
H
X
Notes
:
1. V = Valid X = Don’t Care L = Low level H = High level
2. CKEn signal is input level when commands are issued.
CKEn-1 signal is input level one clock cycle before the commands are issued.
3. These are state designated by the BA0, BA1 signals.
4. DM0
DM3 (W9412G2CB).
5. Power Down Mode can not entry in the burst cycle.
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