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参数资料
| 型号： | W9425G6JB-5 |
| 厂商： | WINBOND ELECTRONICS CORP |
| 元件分类： | DRAM |
| 英文描述： | DDR DRAM, PBGA60 |
| 封装： | 8 X 13 MM, ROHS COMPLIANT, TFBGA-60 |
| 文件页数： | 18/50页 |
| 文件大小： | 852K |
| 代理商： | W9425G6JB-5 |
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W9425G6JB
Publication Release Date: Oct. 08, 2010
- 25 -
Revision A01
9.5 DC Characteristics
SYM.
PARAMETER
MAX.
UNIT
NOTES
-5
IDD0
Operating current: One Bank Active-Precharge;
tRC = tRC min; tCK = tCK min;
DQ, DM and DQS inputs changing once per clock cycle;
Address and control inputs changing once every two clock cycles
65
mA
7
IDD1
Operating current: One Bank Active-Read-Precharge;
Burst = 4; tRC = tRC min; CL = 3; tCK = tCK min; IOUT = 0 mA;
Address and control inputs changing once per clock cycle
80
7, 9
IDD2P
Precharge Power Down standby current:
All Banks Idle; Power down mode;
CKE < VIL max; tCK = tCK min; Vin = (0.5 x VDDQ) for DQ, DQS and DM
5
IDD2F
Idle floating standby current:
CS > VIH min; All Banks Idle; CKE > VIH min; tCK = tCK min;
Address and other control inputs changing once per clock cycle;
Vin =
(0.5 x VDDQ) for DQ, DQS and DM
20
7
IDD2N
Idle standby current:
CS > VIH min; All Banks Idle; CKE > VIH min; tCK = tCK min;
Address and other control inputs changing once per clock cycle;
Vin > VIH min or Vin < VIL max for DQ, DQS and DM
20
7
IDD2Q
Idle quiet standby current:
CS > VIH min; All Banks Idle; CKE > VIH min; tCK = tCK min;
Address and other control inputs stable;
Vin =
(0.5 x VDDQ) for DQ, DQS and DM
20
7
IDD3P
Active Power Down standby current:
One Bank Active; Power down mode;
CKE < VIL max; tCK = tCK min;
Vin =
(0.5 x VDDQ) for DQ, DQS and DM
20
IDD3N
Active standby current:
CS > VIH min; CKE > VIH min; One Bank Active-Precharge;
tRC = tRAS max; tCK = tCK min;
DQ, DM and DQS inputs changing twice per clock cycle;
Address and other control inputs changing once per clock cycle
30
7
IDD4R
Operating current:
Burst = 2; Reads; Continuous burst; One Bank Active;
Address and control inputs changing once per clock cycle;
CL=2; tCK = tCK min; IOUT = 0mA
120
7, 9
IDD4W
Operating current:
Burst = 2; Writes; Continuous burst; One Bank Active;
Address and control inputs changing once per clock cycle;
CL = 2; tCK = tCK min;
DQ, DM and DQS inputs changing twice per clock cycle
115
7
IDD5
Auto Refresh current: tRC = tRFC min
65
7
IDD6
Self Refresh current: CKE < 0.2V; external clock on; tCK = tCK min
2
IDD7
Random Read current: 4 Banks Active Read with activate every 20nS,
Auto-Precharge Read every 20 nS;
Burst = 4; tRCD = 3; IOUT = 0mA;
DQ, DM and DQS inputs changing twice per clock cycle;
Address changing once per clock cycle
175
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相关代理商/技术参数 |
参数描述 |
|---|---|
| W9425G6JB-5 TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR SDRAM X16, 200MHZ |
| W9425G6JB-5I | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY |
| W9425G6JB-5I TR | 制造商:Winbond Electronics Corp 功能描述:256M DDR SDRAM X16, 200MHZ, IN |
| W9425G6JH | 制造商:WINBOND 制造商全称:Winbond 功能描述:4 M × 4 BANKS × 16 BITS DDR SDRAM |
| W9425G6JH-4 | 制造商:Winbond Electronics Corp 功能描述:DRAM Chip DDR SDRAM 256M-Bit 16Mx16 2.5V 66-Pin TSOP-II 制造商:Winbond Electronics 功能描述:IC MEMORY 制造商:Winbond Electronics Corp 功能描述:IC MEMORY 制造商:Winbond 功能描述:16MX16,256MB DDR,250MHZ,2.5V , TSOP 66PIN GREEN |
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