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Cortina Systems LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
7.0 Register Definitions
6
MF Preamble
Suppression
0 = PHY will not accept management frames with
preamble suppressed
1 = PHY accepts management frames with preamble
suppressed
R0
5
Auto-Negotiation
complete
0 = Auto-negotiation not complete
1 = Auto-negotiation complete
R0
4
Remote Fault
0 = No remote fault condition detected
1 = Remote fault condition detected
R/LL
0
3
Auto-Negotiation
Ability
0 = PHY is not able to perform auto-negotiation
1 = PHY is able to perform auto-negotiation
R1
2
Link Status
0 = Link is down
1 = Link is up
R/LL
0
1
Jabber Detect
0 = Jabber condition not detected
1 = Jabber condition detected
R/LH
0
Extended Capability
0 = Basic register capabilities
1 = Extended register capabilities
R1
Table 86
PHY Identification Register 1 (Address 2)
Bit
Name
Description
Type1
Default
15:0
PHY ID Number
The PHY identifier composed of bits 3 through 18 of the
OUI
R
0013 hex
1. R = Read Only
Table 87
PHY Identification Register 2 (Address 3)
Bit
Name
Description
Type1
Default
15:10
PHY ID Number
The PHY identifier composed of bits 19 through 24 of
the OUI
R
011110
9:4
Manufacturer’s
Model Number
6 bits containing manufacturer’s part number
R
001111
3:1
Manufacturer’s
Revision
Number
3 bits containing manufacturer’s revision number
R
XXX2
0
Model Variant
0 = LXT9785
1 = LXT9785/LXT9785E
RX2
1. R = Read Only
2. Refer to the Identification Information section in the Cortina Systems LXT9785/LXT9785E Specification
Update.
Table 85
Status Register (Address 1)
Bit
Name
Description
Type1,
2
Default
1. R = Read Only
2.
Bits that Latch High (LH) or Latch Low (LL) automatically clear when read.