
Page 210
Cortina Systems LXT9785 and LXT9785E Advanced 8-Port 10/100 Mbps PHY Transceivers
LXT9785/LXT9785E
Datasheet
249241, Revision 11.0
16 April 2007
Table 102
Register Bit Map
Reg Title
Bit Fields
Addr
B15
B14
B13
B12
B11
B10
B9
B8
B7
B6
B5
B4
B3
B2
B1
B0
Control Register (Address 0)
Control
Reset
Loopback
Speed
Select
A/N
Enable
Power
Down
Isolate
Re-start
A/N
Duplex
Mode
COL Test
Speed
Select
Reserved
0
Status Register (Address 1)
Status
100Base-T4
100Base-
X Full-
Duplex
100Base-X
Half-Duplex
10 Mbps
Full-
Duplex
10 Mbps
Half-
Duplex
100Base-
T2 Full-
Duplex
100Base-T2
Half-Duplex
Extended
Status
Reserved
MF
Preamble
Suppress
A/N
Complete
Remote
Fault
A/N Ability
Link Status
Jabber
Detect
Extended
Capability
1
PHY ID Registers (Address 2 and 3)
PHY ID 1
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
2
PHY ID2
PHY ID No
MFR Model No
MFR Rev No
Model
Variant
3
Auto-Negotiation Advertisement Register (Address 4)
A/N
Advertise
Next Page
Reserved
Remote
Fault
Reserved
Asymm
Pause
100Base-T4
100Base-
TX Full-
Duplex
100Base-
TX
10Base-T
Full-Duplex
10Base-T
IEEE Selector Field
4
Auto-Negotiation Link Partner Base Page Ability Register (Address 5)
A/N Link
Ability
Next Page
Ack
Remote
Fault
Reserved
Asymm
Pause
100Base-T4
100Base-
TX Full-
Duplex
100Base-
TX
10Base-T
Full-Duplex
10Base-T
IEEE Selector Field
5
Auto-Negotiation Expansion Register (Address 6)
A/N
Expansion
Reserved
Base Page
Parallel
Detect
Fault
Link
Partner
Next Page
Able
Next Page
Able
Page
Received
Link
Partner
A/N Able
6
Auto-Negotiation Next Page Transmit Register (Address 7)
A/N Next
Page Txmit
Next Page
Reserved
Message
Page
Ack 2
Toggle
Message / Unformatted Code Field
7
Auto-Negotiation Link Partner Next Page Ability Register (Address 8)
A/N Link
Next Page
Next Page
Ack
Message
Page
Ack 2
Toggle
Message / Unformatted Code Field
8
Port Configuration Register (Address 16)