参数资料
型号: XRD98L61AIV-F
厂商: Exar Corporation
文件页数: 14/38页
文件大小: 0K
描述: IC CCD DIGITIZER 12BIT 48TQFP
标准包装: 250
位数: 12
通道数: 1
电压 - 电源,模拟: 2.7 V ~ 3.6 V
电压 - 电源,数字: 2.7 V ~ 3.6 V
封装/外壳: 48-TQFP
供应商设备封装: 48-TQFP(7x7)
包装: 托盘
21
Rev. 2.00
XRD98L61
BLACK LEVEL OFFSET CALIBRATION
To get the maximum color resolution and dynamic
range, the XRD9861 uses a digitally controlled cali-
bration circuit to correct for offset in the CCD signal as
well as offset in the CDS, PGA & ADC signal path. This
CDS
12-bit ADC
Hot Pixel
Clipper
Pixel
Averager
+
-
+
Coarse
Accumulator
Fine
Accumulator
Offset Calibration Logic
12
PGA
Reg
Hold, FastCal
OB[7:0]
PGA[9:0]
DB[11:0]
CDAC
FDAC
+
Black Level
Offset Calibration
Loop
DNS[1:0]
ManCAL
CDAC, FDAC
From Serial
Interface
Registers
CCD
signal
OB Lines[7:0]
Wait[11:0]
DNS
Filter
Avg[2:0]
Figure 9. Black Level Offset Calibration Block Diagram
calibration is done while the CCD outputs Optical Black
(OB) pixels. In the “Line” timing mode, the OB pixels at
the start or end of each scan line are used for calibra-
tion.
Offset Register
ADC Output
D9
D8
D7
D6
D5
D4
D3
D2
D1
D0
Black Level (LSB)
X
0
Do Not Use
X
0
1
Do Not Use
X
0
1
0
2 (Minimum offset code)
.
X
1
0
254
X
1
255
Table 3. Black Level Output Control
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