参数资料
型号: XRT86VL30IV80-F
厂商: Exar Corporation
文件页数: 14/175页
文件大小: 0K
描述: IC FRAMR/LIU T1/E1/J1 QD 80LQFP
标准包装: 90
控制器类型: T1/E1/J1 调帧器,LIU
电源电压: 3.3V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 80-LQFP
供应商设备封装: 80-LQFP(12x12)
包装: 托盘
其它名称: 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
105
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
2
Rx OOF
State
Change
RUR/
WC
0
Change in Receive Out of Frame Defect Condition Interrupt Status.
This Reset-Upon-Read bit field indicates whether or not the “Change in Receive
Out of Frame Defect Condition” interrupt has occurred since the last read of this
register.
Out of Frame defect condition is declared when “TOLR” out of “RANG” errors in
the framing bit pattern is detected. (Register 0x010B)
If this interrupt is enabled, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1. Whenever the Receive T1 Framer block declares the Out of Frame defect
condition.
2. Whenever the Receive T1 Framer block clears the Out of Frame defect
condition
0 = Indicates that the “Change in Receive Out of Frame defect condition” interrupt
has not occurred since the last read of this register
1 = Indicates that the “Change in Receive Out of Frame defect condition” interrupt
has occurred since the last read of this register
1
RxAIS State
Change
RUR/
WC
0
Change in Receive AIS Condition Interrupt Status.
This Reset-Upon-Read bit field indicates whether or not the “Change in Receive
AIS Condition” interrupt has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1. Whenever the Receive T1 Framer block declares the AIS condition.
2. Whenever the Receive T1 Framer block clears the AIS condition
0 = Indicates that the “Change in Receive AIS condition” interrupt has not
occurred since the last read of this register
1 = Indicates that the “Change in Receive AIS condition” interrupt has occurred
since the last read of this register
0
RxYEL State
Change
RUR/
WC
0
Change in Receive Yellow Alarm Interrupt Status.
This Reset-Upon-Read bit field indicates whether or not the “Change in Receive
Yellow Alarm Condition” interrupt has occurred since the last read of this register.
If this interrupt is enabled, then the Receive T1 Framer block will generate an
interrupt in response to either one of the following conditions.
1. Whenever the Receive T1 Framer block declares the Yellow Alarm
condition.
2. Whenever the Receive T1 Framer block clears the Yellow Alarm condition
0 = Indicates that the “Change in Receive Yellow Alarm condition” interrupt has
not occurred since the last read of this register
1 = Indicates that the “Change in Receive Yellow Alarm condition” interrupt has
occurred since the last read of this register
TABLE 96: ALARM & ERROR INTERRUPT STATUS REGISTER (AEISR)
HEX ADDRESS: 0X0B02
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
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