参数资料
型号: XRT86VL30IV80-F
厂商: Exar Corporation
文件页数: 38/175页
文件大小: 0K
描述: IC FRAMR/LIU T1/E1/J1 QD 80LQFP
标准包装: 90
控制器类型: T1/E1/J1 调帧器,LIU
电源电压: 3.3V
工作温度: -40°C ~ 85°C
安装类型: 表面贴装
封装/外壳: 80-LQFP
供应商设备封装: 80-LQFP(12x12)
包装: 托盘
其它名称: 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
127
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
TABLE 113: DATA LINK INTERRUPT ENABLE REGISTER 2 (DLIER2)
HEX ADDRESS: 0X0B17
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
Reserved
-
Reserved
6
TxSOT ENB
R/W
0
Transmit HDLC2 Controller Start of Transmission (TxSOT)
Interrupt Enable
This bit enables or disables the “Transmit HDLC2 Controller Start of
Transmission (TxSOT) “Interrupt within the XRT86VL30 device.
Once this interrupt is enabled, the Transmit HDLC2 Controller will
generate an interrupt when it has started to transmit a data link mes-
sage.
0 = Disables the Transmit HDLC2 Controller Start of Transmission
(TxSOT) interrupt.
1 = Enables the Transmit HDLC2 Controller Start of Transmission
(TxSOT) interrupt.
5
RxSOT ENB
R/W
0
Receive HDLC2 Controller Start of Reception (RxSOT) Interrupt
Enable
This bit enables or disables the “Receive HDLC2 Controller Start of
Reception (RxSOT) “Interrupt within the XRT86VL30 device. Once
this interrupt is enabled, the Receive HDLC2 Controller will generate
an interrupt when it has started to receive a data link message.
0 = Disables the Receive HDLC2 Controller Start of Reception
(RxSOT) interrupt.
1 = Enables the Receive HDLC2 Controller Start of Reception
(RxSOT) interrupt.
4
TxEOT ENB
R/W
0
Transmit HDLC2 Controller End of Transmission (TxEOT) Inter-
rupt Enable
This bit enables or disables the “Transmit HDLC2 Controller End of
Transmission (TxEOT) “Interrupt within the XRT86VL30 device.
Once this interrupt is enabled, the Transmit HDLC2 Controller will
generate an interrupt when it has finished transmitting a data link
message.
0 = Disables the Transmit HDLC2 Controller End of Transmission
(TxEOT) interrupt.
1 = Enables the Transmit HDLC2 Controller End of Transmission
(TxEOT) interrupt.
3
RxEOT ENB
R/W
0
Receive HDLC2 Controller End of Reception (RxEOT) Interrupt
Enable
This bit enables or disables the “Receive HDLC2 Controller End of
Reception (RxEOT) “Interrupt within the XRT86VL30 device. Once
this interrupt is enabled, the Receive HDLC2 Controller will generate
an interrupt when it has finished receiving a complete data link mes-
sage.
0 = Disables the Receive HDLC2 Controller End of Reception
(RxEOT) interrupt.
1 = Enables the Receive HDLC2 Controller End of Reception
(RxEOT) interrupt.
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