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参数资料
型号： XRT86VL30IV80-F
厂商： Exar Corporation
文件页数： 41/175页
文件大小： 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 80LQFP
标准包装： 90
控制器类型： T1/E1/J1 调帧器，LIU
电源电压： 3.3V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 80-LQFP
供应商设备封装： 80-LQFP（12x12）
包装： 托盘
其它名称： 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
130
REV. 1.0.1
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
TABLE 116: DATA LINK STATUS REGISTER 3 (DLSR3)
HEX ADDRESS: 0X0B26
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
7
MSG TYPE
RUR/
WC
0
HDLC3 Message Type Identifier
This READ ONLY bit indicates the type of data link message received
by Receive HDLC 3 Controller. Two types of data link messages are
supported within the XRT86VL30 device: Message Oriented Signaling
(MOS) or Bit-Oriented Signalling (BOS).
0 = Indicates Bit-Oriented Signaling (BOS) type data link message is
received
1 = Indicates Message Oriented Signaling (MOS) type data link mes-
sage is received
6
TxSOT
RUR/
WC
0
Transmit HDLC3 Controller Start of Transmission (TxSOT) Inter-
rupt Status
This Reset-Upon-Read bit indicates whether or not the “Transmit
HDLC3 Controller Start of Transmission (TxSOT) “Interrupt has
occurred since the last read of this register. Transmit HDLC3 Controller
will declare this interrupt when it has started to transmit a data link mes-
sage. For sending large HDLC messages, start loading the next avail-
able buffer once this interrupt is detected.
0 = Transmit HDLC3 Controller Start of Transmission (TxSOT) interrupt
has not occurred since the last read of this register
1 = Transmit HDLC3 Controller Start of Transmission interrupt (TxSOT)
has occurred since the last read of this register.
5
RxSOT
RUR/
WC
0
Receive HDLC3 Controller Start of Reception (RxSOT) Interrupt
Status
This Reset-Upon-Read bit indicates whether or not the Receive
HDLC3 Controller Start of Reception (RxSOT) interrupt has occurred
since the last read of this register. Receive HDLC3 Controller will
declare this interrupt when it has started to receive a data link mes-
sage.
0 = Receive HDLC3 Controller Start of Reception (RxSOT) interrupt
has not occurred since the last read of this register
1 = Receive HDLC3 Controller Start of Reception (RxSOT) interrupt
has occurred since the last read of this register
4
TxEOT
RUR/
WC
0
Transmit HDLC3 Controller End of Transmission (TxEOT) Interrupt
Status
This Reset-Upon-Read bit indicates whether or not the Transmit
HDLC3 Controller End of Transmission (TxEOT) Interrupt has occurred
since the last read of this register. Transmit HDLC3 Controller will
declare this interrupt when it has completed its transmission of a data
link message. For sending large HDLC messages, it is critical to load
the next available buffer before this interrupt occurs.
0 = Transmit HDLC3 Controller End of Transmission (TxEOT) interrupt
has not occurred since the last read of this register
1 = Transmit HDLC3 Controller End of Transmission (TxEOT) interrupt
has occurred since the last read of this register
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XRT86VL30IVF 制造商:Exar Corporation 功能描述:
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