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参数资料
型号： XRT86VL30IV80-F
厂商： Exar Corporation
文件页数： 148/175页
文件大小： 0K
描述： IC FRAMR/LIU T1/E1/J1 QD 80LQFP
标准包装： 90
控制器类型： T1/E1/J1 调帧器，LIU
电源电压： 3.3V
工作温度： -40°C ~ 85°C
安装类型： 表面贴装
封装/外壳： 80-LQFP
供应商设备封装： 80-LQFP（12x12）
包装： 托盘
其它名称： 1016-1486
XRT86VL30IV80-F-ND
XRT86VL30
69
SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
REV. 1.0.1
2
Tx_IDLE
R/W
0
Transmit Idle (Flag Sequence Byte)
This bit configures the Transmit HDLC Controller Block #3 to unconditionally
transmit a repeating string of Flag Sequence octets (0X7E) in the data link
channel to the Remote terminal. In normal conditions, the Transmit HDLC
Controller block will repeatedly transmit the Flag Sequence octet whenever
there is no MOS message to transmit to the remote terminal equipment.
However, if the user invokes this “Transmit Idle Sequence” feature, then the
Transmit HDLC Controller block will UNCONDITIONALLY transmit a repeat-
ing stream of the Flag Sequence octet (thereby overwriting all outbound
MOS data-link messages).
0 - Configures the Transmit HDLC Controller Block # 3 to transmit data-link
information in a “normal” manner.
1 - Configures the Transmit HDLC Controller block # 3 to transmit a repeat-
ing string of Flag Sequence Octets (0x7E).
NOTE: This bit is ignored if the Transmit HDLC3 controller is operating in the
BOS Mode - bit 0 (MOS/BOS) within this register is set to 0.
1
Tx_FCS_EN
R/W
0
Transmit LAPD Message with Frame Check Sequence (FCS)
This bit permits the user to configure the Transmit HDLC Controller block # 3
to compute and append FCS octets to the “back-end” of each outbound
MOS data-link message.
0 - Configures the Transmit HDLC Controller block # 3 to NOT compute and
append the FCS octets to the back-end of each outbound MOS data-link
message.
1 - Configures the Transmit HDLC Controller block # 3 TO COMPUTE and
append the FCS octets to the back-end of each outbound MOS data-link
message.
NOTE:
This bit is ignored if the transmit HDLC3 controller has been
configured to operate in the BOS mode - bit 0 (MOS/BOS) within this
register is set to 0.
0
MOS/BOS
R/W
0
Message Oriented Signaling/Bit Oriented Signaling Send
This bit permits the user to enable LAPD transmission through HDLC Con-
troller Block # 3 using either BOS (Bit-Oriented Signaling) or MOS (Mes-
sage-Oriented Signaling) frames.
0 - Transmit HDLC Controller block # 3 BOS message Send.
1 - Transmit HDLC Controller block # 3 MOS message Send.
NOTE: This is not an Enable bit. This bit must be set to "0" each time a BOS
is to be sent.
TABLE 52: DATA LINK CONTROL REGISTER (DLCR3)
HEX ADDRESS: 0X0153
BIT
FUNCTION
TYPE
DEFAULT
DESCRIPTION-OPERATION
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XRT86VL30IVF 制造商:Exar Corporation 功能描述:
XRT86VL30IV-F 功能描述:网络控制器与处理器 IC 1-Ch T1/E1/J1 RoHS:否 制造商:Micrel 产品:Controller Area Network (CAN) 收发器数量: 数据速率: 电源电流（最大值）:595 mA 最大工作温度:+ 85 C 安装风格:SMD/SMT 封装 / 箱体:PBGA-400 封装:Tray
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XRT86VL32 制造商:EXAR 制造商全称:EXAR 功能描述:DUAL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
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