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| 型号： | ZL2101ALAF |
| 厂商： | Intersil |
| 文件页数： | 17/27页 |
| 文件大小： | 0K |
| 描述： | IC REG BUCK SYNC ADJ 6A 36QFN |
| 标准包装： | 50 |
| 类型： | 降压（降压） |
| 输出类型： | 可调式 |
| 输出数： | 1 |
| 输出电压： | 0.54 V ~ 5.5 V |
| 输入电压： | 4.5 V ~ 14 V |
| PWM 型： | 电压模式 |
| 频率 - 开关： | 200kHz ~ 1MHz |
| 电流 - 输出： | 6A |
| 同步整流器： | 是 |
| 工作温度： | -40°C ~ 85°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 36-VFQFN 裸露焊盘 |
| 包装： | 托盘 |
| 供应商设备封装： | 36-QFN（6x6） |
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ZL2101
Now the output inductance can be calculated using Equation 3,
shown in Equations 7 and 8:
V OUT × ? ? 1 ? OUT
? ?
?
?
V INM
where V INM is the maximum input voltage:
? V ?
(EQ. 3)
L OUT =
fsw × I opp
The average inductor current is equal to the maximum output
C OUT =
ESR =
I opp
8 × f sw ×
V orip
2 × I opp
V orip
2
(EQ. 7)
(EQ. 8)
current. The peak inductor current (I Lpk ) is calculated using
Equation 4 where I OUT is the maximum output current:
Use these values to make an initial capacitor selection, using a
single capacitor or several capacitors in parallel.
I Lpk = I OUT +
I opp
2
(EQ. 4)
After a capacitor has been selected, the resulting output voltage
ripple can be calculated using Equation 9:
V orip = I opp × ESR +
I opp
Select an inductor rated for the average DC current with a peak
current rating above the peak current computed in Equation 4.
In overcurrent or short-circuit conditions, the inductor may have
currents greater than 2X the normal maximum rated output
current. It is desirable to use an inductor that still provides some
inductance to protect the load and the internal MOSFETs from
damaging currents in this situation.
Once an inductor is selected, the DCR and core losses in the
inductor are calculated. Use the DCR specified in the inductor
manufacturer’s data sheet.
(EQ. 9)
8 × f sw × C OUT
Because each part of this equation was made to be less than or
equal to half of the allowed output ripple voltage, the V orip should
be less than the desired maximum output ripple.
INPUT CAPACITOR
It is highly recommended that dedicated input capacitors be
used in any point-of-load design, even when the supply is
powered from a heavily filtered 5V or 12V “bulk” supply from an
P LDCR = DCR × I Lrms
2
(EQ. 5)
off-line power supply. This is because of the high RMS ripple
current that is drawn by the buck converter topology. This ripple
( I )
I Lrms = I OUT +
I CINrms = I OUT × D × ( 1 ? D )
I Lrms is given by Equation 6:
2 opp
12
2
(EQ. 6)
(I CINrms ) can be determined from Equation 10:
(EQ. 10)
Without capacitive filtering near the power supply circuit, this
current would flow through the supply bus and return planes,
where I OUT is the maximum output current. Next, calculate the
core loss of the selected inductor. Since this calculation is
specific to each inductor and manufacturer, refer to the chosen
inductor data sheet. Add the core loss and the DCR loss and
compare the total loss to the maximum power dissipation
recommendation in the inductor data sheet.
OUTPUT CAPACITOR SELECTION
Several trade-offs must also be considered when selecting an
output capacitor. Low ESR values are needed to have a small
output deviation during transient load steps (V osag ) and low
output voltage ripple (V orip ). However, capacitors with low ESR,
such as semi-stable (X5R and X7R) dielectric ceramic capacitors,
also have relatively low capacitance values. Many designs can
use a combination of high capacitance devices and low ESR
devices in parallel.
For high ripple currents, a low capacitance value can cause a
significant amount of output voltage ripple. Likewise, in high
transient load steps, a relatively large amount of capacitance is
needed to minimize the output voltage deviation while the
inductor current ramps up or down to the new steady state
output current value.
As a starting point, apportion one-half of the output ripple
voltage to the capacitor ESR and the other half to capacitance, as
17
coupling noise into other system circuitry. The input capacitors
should be rated at 1.2X the ripple current calculated in Equation
10 to avoid overheating of the capacitors due to the high ripple
current, which can cause premature failure. Ceramic capacitors
with X7R or X5R dielectric with low ESR and 1.1X the maximum
expected input voltage are recommended.
BOOTSTRAP CAPACITOR SELECTION
The high-side driver boost circuit utilizes an internal Schottky
diode (D B ) and an external bootstrap capacitor (C B ) to supply
sufficient gate drive for the high-side MOSFET driver. C B should
be a 47nF ceramic type rated for at least 10V.
C V2P5 SELECTION
This capacitor is used to both stabilize and provide noise filtering
for the 2.5V internal power supply. It should be between 4.7μF
and 10μF, should use a semi-stable X5R or X7R dielectric
ceramic with a low ESR (less than 10m Ω ) and should have a
rating of 4V or more.
C VR SELECTION
This capacitor is used to both stabilize and provide noise filtering
for the 7V reference supply. It should be between 4.7μF and
10μF, should use a semi-stable X5R or X7R dielectric ceramic
capacitor with a low ESR (less than 10m Ω ) and should have a
rating of 10V or more. Because the current for the bootstrap
supply is drawn from this capacitor, C VR should be sized at least
10X the value of C B so that a discharged C B does not cause the
voltage on it to droop excessively during a C B recharge pulse.
FN7730.0
January 23, 2012
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