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参数资料
| 型号： | ZL50418GKG2 |
| 厂商： | CONEXANT SYSTEMS |
| 元件分类： | 网络接口 |
| 英文描述： | DATACOM, LAN SWITCHING CIRCUIT, PBGA553 |
| 封装： | 37.50 X 37.50 MM, 2.33 MM HEIGHT, LEAD FREE, MS-034, HSBGA-553 |
| 文件页数： | 106/155页 |
| 文件大小： | 1928K |
| 代理商： | ZL50418GKG2 |
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ZL50418
Data Sheet
54
Zarlink Semiconductor Inc.
6.5.1
Port-Based VLAN
An administrator can use the PVMAP registers to configure the ZL50418 for port-based VLAN (See “Register
Definition” on page 75.). For example, ports 1-3 might be assigned to the Marketing VLAN, ports 4-6 to the
Engineering VLAN and ports 7-9 to the Administrative VLAN. The ZL50418 determines the VLAN membership of
each packet by noting the port on which it arrives. From there, the ZL50418 determines which outgoing port(s)
is/are eligible to transmit each packet or whether the packet should be discarded.
Table 6 - PVMAP Register
For example, in the above table, a "1" denotes that an outgoing port is eligible to receive a packet from an incoming
port. A 0 (zero) denotes that an outgoing port is not eligible to receive a packet from an incoming port.
In this example:
Data packets received at port #0 are eligible to be sent to outgoing ports 1 and 2.
Data packets received at port #1 are eligible to be sent to outgoing ports 0 and 2.
Data packets received at port #2 are NOT eligible to be sent to ports 0 and 1.
6.5.2
Tagged-Based VLAN
The ZL50418 supports the IEEE 802.1Q specification for “tagging” frames. The specification defines a way to
coordinate VLANs across multiple switches. In the specification, an additional 4-octet header (or “tag”) is inserted in
a frame after the source MAC address and before the frame type. 12 bits of the tag are used to define the VLAN ID.
Packets are then switched through the network with each ZL50418 simply swapping the incoming tag for an
appropriate forwarding tag rather than processing each packet's contents to determine the path. This approach
minimizes the processing needed once the packet enters the tag-switched network. In addition, coordinating VLAN
IDs across multiple switches enables VLANs to extend to multiple switches.
Up to 255 VLANs are supported in the ZL50418. The 4 K VLANs specified in the IEEE 802.1Q are mapped to 255
VLAN indexes. The mapping is made within the VLAN index (VIX) mapping table. Based on the VIXn, the source
and destination port membership is checked against the content in the VLAN Index Port Association Table. If the
destination port is a member of the VLAN, the packet is forwarded; otherwise it is discarded. If the source port is not
a member, a “New VLAN Port” message is sent to the CPU. A filter can be applied to discard the packet if the
source port is not a member of the VLAN.
For more information on VLANs and details of the VLAN tables, please refer to the IEEE 802.1Q VLAN Setup
Application Note, ZLAN-06.
Destination Port Numbers Bit Map
Port Registers
26
…
2
1
0
Register for Port #0
PVMAP00_0[7:0] to PVMAP00_3[2:0]
01
1
0
Register for Port #1
PVMAP01_0[7:0] to PVMAP01_3[2:0]
01
0
1
Register for Port #2
PVMAP02_0[7:0] to PVMAP02_3[2:0]
00
0
…
Register for Port #26
PVMAP26_0[7:0] to PVMAP26_3[2:0]
00
0
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