参数资料
型号: 71M6531D-IM/F
厂商: TERIDIAN SEMICONDUCTOR CORP
元件分类: 电源管理
英文描述: 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, QCC68
封装: LEAD FREE, QFN-68
文件页数: 74/120页
文件大小: 2477K
代理商: 71M6531D-IM/F
FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
v1.3
2005-2010 TERIDIAN Semiconductor Corporation
57
To facilitate transition to sleep mode, which is useful when an unprogrammed IC is mounted on a PCB
with a battery installed, the Teridian production test programs the following six-byte sequence into the
flash location starting at address 0x00000: 0x74 - 0x40 - 0x90 - 0x20 - 0xA9 - 0xF0. This sequence de-
codes to the following assembler code:
0000: 7440
MOV A,#40
; set bit 6 in accumulator
0002: 9020A9
MOV DPTR,#20A9
; point to I/O RAM address 0x20A9
0005: F0
MOVX @DPTR,A
; set bit 6 (sleep) in 0x20A9
Transitions from both LCD and SLEEP mode are initiated by the wake-up timer timeout conditions or
pushbutton events. When the PB pin is pulled high (pushbutton is pressed), the IE_PB interrupt flag (SFR
0xE8[4]) is set, and when the wake-up timer times out, the IE_WAKE interrupt flag (SFR 0xE8[5]) is set.
In the absence of system power, if the voltage margin for the LDO regulator providing 2.5 V to the internal
circuitry becomes too low to be safe, the part automatically enters sleep mode (BAT_OK false). The battery
voltage must stay above 3 V to ensure that BAT_OK remains true. Under this condition, the 71M6531
stays in SLEEP mode, even if the voltage margin for the LDO improves (BAT_OK true). Table 52 shows
the circuit functions available in each operating mode.
Table 52: Available Circuit Functions
Circuit Function
System Power
Battery Power (Nonvolatile Supply)
MISSION
BROWNOUT
LCD
SLEEP
CE
Yes
CE Data RAM
Yes
FIR
Yes
Analog circuits
Yes
MPU clock rate
From PLL, as
defined by
MPU_DIV[2:0]
28.672 kHz
(7/8 of 32768 Hz)
MPU_DIV[2:0]
Yes
ICE
Yes
DIO Pins
Yes
Watchdog Timer
Yes
LCD
Yes
EEPROM Interface (2-wire)
Yes
Yes (8 kb/s)
EEPROM Interface (3-wire)
Yes
Yes (16 kb/s)
UART
Yes
300 bd
Optical TX modulation
Yes
Flash Read
Yes
Flash Page Erase
Yes
Flash Write
Yes
RAM Read and Write
Yes
Wakeup Timer
Yes
OSC and RTC
Yes
XRAM data preservation
Yes
V3P3D voltage output pin
Yes
GPO – GP7 registers
Yes
– indicates not active
2.3.1
BROWNOUT Mode
In BROWNOUT mode, most non-metering digital functions are active (as shown in Table 52), including
ICE, UART, EEPROM, LCD and RTC. In BROWNOUT mode, a low bias current regulator will provide
2.5 Volts to V2P5 and V2P5NV. The regulator has an output called BAT_OK to indicate that it has sufficient
overhead. When BAT_OK = 0, the part will enter SLEEP mode. From BROWNOUT mode, the processor
相关PDF资料
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71M6532F-IGTR/F 1-CHANNEL POWER SUPPLY MANAGEMENT CKT, PQFP100
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