参数资料
型号: 71M6531F-DB
厂商: Maxim Integrated Products
文件页数: 47/121页
文件大小: 0K
描述: BOARD DEMO 71M6531F
产品培训模块: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
标准包装: 1
主要目的: 电源管理,电度表/功率表
嵌入式:
已用 IC / 零件: 71M6531
主要属性: 单相功率表
已供物品: 2 个板,线缆,CD,电源
FDS 6531/6532 005
Data Sheet 71M6531D/F-71M6532D/F
Two-Pin EEPROM Interface
The dedicated 2-pin serial interface communicates with external EEPROM devices. The interface is
multiplexed onto the DIO4 (SCK) and DIO5 (SDA) pins and is selected by setting DIO_EEX[1:0] = 01.
The MPU communicates with the interface through the SFR registers EEDATA and EECTRL . If the MPU
wishes to write a byte of data to the EEPROM, it places the data in EEDATA and then writes the Transmit
code to EECTRL . This initiates the transmit operation which is finished when the BUSY bit falls. INT5 is also
asserted when BUSY falls. The MPU can then check the RX_ACK bit to see if the EEPROM acknowledged
the transmission.
A byte is read by writing the Receive command to EECTRL and waiting for the BUSY bit to fall. Upon
completion, the received data is in EEDATA . The serial transmit and receive clock is 78 kHz during each
transmission and then holds in a high state until the next transmission. The EECTRL bits when the two-pin
interface is selected are shown in Table 47 .
Table 47: EECTRL Bits for 2-pin Interface
Status
Bit
7
6
5
4
Name
ERROR
BUSY
RX_ACK
TX_ACK
Read/
Write
R
R
R
R
Reset
State
0
0
1
1
Polarity
Positive
Positive
Negative
Negative
Description
1 when an illegal command is received.
1 when serial data bus is busy.
0 indicates that the EEPROM sent an ACK bit.
0 indicates when an ACK bit has been sent to the
EEPROM.
No-op command. Stops the I C
3:0
CMD[3:0]
W
0000
Positive
CMD[3:0]
0000
Operation
2
clock (SCK, DIO4). If not issued,
SCK keeps toggling.
0010
0011
0101
0110
1001
Others
Receive a byte from the EEPROM
and send ACK.
Transmit a byte to the EEPROM.
Issue a STOP sequence.
Receive the last byte from the
EEPROM and do not send ACK.
Issue a START sequence.
No operation, set the ERROR bit.
The EEPROM interface can also be operated by controlling the DIO4 and DIO5 pins directly. In
this case, a resistor has to be used in series with SDA to avoid data collisions due to limits in the
speed at which the SDA pin can be switched from output to input. Controlling DIO4 and DIO5
directly is discouraged, because it may tie up the MPU to the point where it may become too busy
to process interrupts.
Three-Wire (μ-Wire) EEPROM Interface
A 500 kHz three-wire interface, using SDATA, SCK and a DIO pin for CS is available. The interface is
selected by setting DIO_EEX[1:0] = 2 (b10). The EECTRL bits when the three-wire interface is selected
are shown in Table 48 . When EECTRL is written, up to 8 bits from EEDATA are either written to the
EEPROM or read from the EEPROM, depending on the values of the EECTRL bits.
The μ-Wire EEPROM interface is only functional when MPU_DIV[2:0] = 000.
Rev 2
47
相关PDF资料
PDF描述
71M6533-DB BOARD DEMO 71M6533
71M6534H-DB BOARD DEMO 71M6534H
71M6541F-DB DEMO BOARD 71M6541F
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72-CNV-5 CONVERTER RS-232 TO RS-422 5V
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