参数资料
型号: 7805ALPRPDB
厂商: MAXWELL TECHNOLOGIES
元件分类: ADC
英文描述: 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP28
封装: RAD-PAK, DIP-28
文件页数: 17/34页
文件大小: 605K
代理商: 7805ALPRPDB
Memory
PRELIMINARY
24
All data sheets are subject to change without notice
2001 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected ADC
7805ALP
12.19.01 Rev 6
1000583
Figure 21 shows the Main DAC transfer function for twos complement coding. Any Main DAC output voltage can be
expressed as:
VOUT' = VBIAS + 1.875 X VBIAS X NA/1024
where NA is the decimal equivalent of the twos complement input code. NA ranges from –512 to +511.
FIGURE 21. MAIN DAC OUTPUT VOLTAGE VS. DAC INPUT CODES (HEX) FOR TWOS COMPLEMENT CODING
Table 21 shows the twos complement transfer function for the Sub DAC. Figure 22 shows the Sub DAC transfer func-
tion for twos complement coding. Any Sub DAC output voltage can be expressed as:
VOUT" = VBIAS/16 x (NB/256)
where NB is the decimal equivalent of the twos complement input code. NB ranges from –128 to +127.
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