参数资料
型号: 7805ALPRPDB
厂商: MAXWELL TECHNOLOGIES
元件分类: ADC
英文描述: 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PDIP28
封装: RAD-PAK, DIP-28
文件页数: 9/34页
文件大小: 605K
代理商: 7805ALPRPDB
Memory
PRELIMINARY
17
All data sheets are subject to change without notice
2001 Maxwell Technologies
All rights reserved.
16-Bit Latchup Protected ADC
7805ALP
12.19.01 Rev 6
1000583
TABLE 18. 7805ALP DAC DATA/CONTROL REGISTER SELECTION TABLE
7805ALP SYSTEM OR CHANNEL CONTROL REGISTER SELECTION
MD0
0
This enables writing to the system control register. The contents of this are shown in Figure 11. Mode must be
low to access this control register.
1
This enables writing to the channel control register. The contents of this are shown in Figure 12. Mode must
also be low to access this control register.
7805ALP SYSTEM CONTROL REGISTER
The bits in this register allow control over all DACs in the package. The control bits include data format (10/8), power
down (PD), DAC input coding select (BIN/COMP), system standby (SSTBY) and a system clear (SCLR). The function
of these bits is as follows:
Data Format
10/8
0
10-bit parallel loading structure.
1
Byte loading structure. (8+2 loading).
Input Coding
BIN/COMP
0
Twos complement coding.
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