参数资料
型号: A3944KLPTR-T
厂商: Allegro Microsystems Inc
文件页数: 25/31页
文件大小: 0K
描述: IC PREDRIVER MOSFET 6CH TSSOP
标准包装: 8,000
配置: 低端
输入类型: 并行/串行
延迟时间: 200ns
电流 - 峰: 50mA
配置数: 6
输出数: 6
电源电压: 6 V ~ 40 V
工作温度: -40°C ~ 150°C
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 带卷 (TR)
A3944
Automotive, Low Side FET Pre-Driver
( V L – V G ) R SG
(10)
R L + R SG
– 1 R SGmax (12)
The voltage at the DRNx terminal,V DRNx , in the off-state when a
short to ground is present is defined as:
V DRNx = + V G + I DPU R D
where
V L is the load supply voltage,
V G is the ground (offset) voltage,
R SG is the resistance of the short to ground (offset),
R L is the load resistance,
I DPU is the diagnostic pull-up current, and
R D is the DRNx current limit resistor.
Note that this equation is only valid for short to ground condi-
tions when:
V DRNx < V OCL
where V OCL is the open load clamp voltage.
A short to ground is detected when:
V D < V STG
where V STG is the short to ground detect voltage, then:
short detection criterion, R Lmax ., defined by:
V L – V Gmax
R Lmax =
V STGmin – V Gmax – I DPUmax R Dmax
Assuming worst case conditions of a maximum ground voltage
offset of +1 V and a maximum short resistance of 0.5 Ω allows
the minimum load resistance to be calculated for different load
voltages. This will be maximum at either V Lmax or V Lmin depend-
ing on the relative values of R Dmax and V L .
For example, at a load voltage of 6 V and R D set to 5 k Ω , a short
will be detected with a load resistance greater than 0.75 Ω when
SG = 0, or at 2.63 Ω when SG = 1. At a load voltage of 18 V the
same conditions give 0.9 Ω for SG = 0 and 0.34 Ω for SG = 1.
The limiting values for SG = 0 and SG = 1 are shown in figure 16
for load voltage from 6 to 36 V and with a DRNx current limit
resistor (R Dmax ) of 7 k Ω . In this figure, a load resistance above
the line is guaranteed to allow detection of a 0.5 Ω short to a
+1 V offset ground. An increase in R D raises the line.
( V L – V G ) R SG
R L + R SG
+ V G + I DPU R D < V STG
Note that R D must be less than:
( V STG V G )
I DPU
( V L – V G ) R SG
R L + R SG
< V STG – V G – I DPU R D
R L >
V L – V G
V STG – V G – I DPU R D
– 1 R SG
(11)
Minimum load resistance
The minimum value of R L that will always allow a short to be
detected is given by the maximum value of R L that satisfies the
Figure 16. Short to ground detection limits
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
25
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