参数资料
型号: A3981KLPTR-T
厂商: Allegro Microsystems Inc
文件页数: 18/43页
文件大小: 0K
描述: IC MOTOR DVR MICROSTEP 28-TSSOP
标准包装: 1
系列: *
应用: *
输出数: *
电流 - 输出: *
电压 - 负载: *
电源电压: *
工作温度: *
安装类型: 表面贴装
封装/外壳: 28-SOIC(0.173",4.40mm 宽)裸露焊盘
供应商设备封装: 28-TSSOP 裸露焊盘
包装: 标准包装
其它名称: 620-1458-6
A3981
Automotive, Programmable Stepper Driver
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CONFIG 1
0
1
OSC
TSC1
TSC0
CD3
CD2
CD1
CD0
DIAG1
DIAG0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
RUN
1
0
EN
OL1
OL0
HLR
SLEW
BRK
DCY1
DCY0
SC5
SC4
SC3
SC2
SC1
SC0
0
0
1
0
1
0
0
1
0
0
0
0
0
0
Configuration Register 1
Run Register
OSC
Selects clock source
Phase current enable
OSC
Clock Source
Default
EN
OR with ENABLE pin
0
1
Internal
External
D
EN
0
Phase Current Enable
Output bridges disabled if ENABLE
pin = 0
Default
D
Overcurrent fault delay
TSC[1..0] Assumes 4-MHz clock
1
Output bridges enabled
Open load current threshold as a percentage of
TSC1
0
TSC0
0
Detect Delay Time
0.5 μ s
Default
OL[1..0]
OL1
maximum current defined by I SMAX and MXI[1..0]
OL0 Open Load Current Default
0
1
1 μ s
0
0
20%
1
1
0
1
2 μ s
3 μ s
D
0
1
1
0
30%
40%
D
PWM count difference for ST detection
1
1
50%
CD[3..0]
Default to 8
HLR
Selects slow decay and brake recirculation path
DIAG[1..0] Selects signal routed to DIAG output
DIAG1 DIAG0 Signal on DIAG Pin Default
0 0 Fault–low true D
0 1 ST–low true
HLR
0
1
SLEW
Recirculation Path
High side
Low side
Slew rate control
Default
D
1
1
0
1
PWM-on, Phase A
Temperature
SLEW
0
Slew Rate Control
Disable
Default
1
BRK
BRK
0
1
Enable
Brake enable
Brake
Normal operation
Brake active
D
Default
D
DCY[1..0] Decay mode selection
DCY1
0
0
1
1
DCY0
0
1
0
1
Decay Mode
Slow
Mixed—PFD fixed
Mixed—PFD auto
Fast
Default
D
SC[5..0]
Step change number
2’s complement format
Positive value increases Step Angle Number
Negative value decreases Step Angle Number
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
18
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