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| 型号： | A4979GLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 13/44页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRVR MICRO STEP 28TSSOP |
| 特色产品： | A4979 Series |
| 标准包装： | 1 |
| 应用： | 直流电机驱动器，PWM 电机驱动器，步进电机驱动器 |
| 评估套件： | 可供 |
| 输出数： | 1 |
| 电流 - 输出： | 1.5A |
| 电压 - 负载： | 7 V ~ 50 V |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
| 包装： | 标准包装 |
| 其它名称： | 620-1463-6 |
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A4979
Microstepping Programmable Stepper Motor Driver
With Stall Detect and Short Circuit Protection
bits in the diagnostic registers remain set until cleared by a
diagnostic registers reset.
? If the output of the internal regulator, V REG , goes below the
VREG undervoltage threshold, the A4979 will disable the
outputs and indicate the fault. When the regulator output rises
above the VREG undervoltage threshold, the outputs will be
re-enabled and the fault flag removed. The fault bits in the diag-
nostic registers remain set until cleared by a diagnostic registers
reset.
? If the logic supply voltage, V DD , goes below the VDD under-
voltage threshold, the A4979 will be completely disabled except
to monitor the V DD voltage level. When the logic supply voltage
rises above the VDD undervoltage threshold, a power-on reset
will take place and all registers will be reset to the default state.
Note that both the VREG undervoltage monitor and the V BB
undervoltage monitor indicate a fault by using the same fault
bit, UV, in both Fault registers. The state of the UV fault bit is
determined by the logical OR of the fault output from these two
undervoltage monitors.
Temperature Monitors
Three specific temperature thresholds are provided: a hot
warning, a cold warning, and an overtemperature shutdown. In
addition, the analog internal signal used to determine the chip
temperature can be selected in Configuration Register 1 as the
output on the DIAG pin through the serial interface. The analog
scale is T J ≈ (V DIAG – V TO ) / A T .
Hot Warning If the chip temperature rises above the Hot Tem-
perature Warning Threshold, T JWH , the Fault flag will go low and
the Hot Warning bits will be set in the diagnostic registers. No
action will be taken by the A4979. When the temperature drops
below the Hot Temperature Warning Threshold, the Fault flag
will go high but the Hot Warning bits remain set in the diagnostic
registers until reset.
Cold Warning If the chip temperature falls below the Cold
Temperature Warning Threshold, T JWC , the Fault flag will go low
and the Cold Warning bits will be set in the diagnostic registers.
No action will be taken by the A4979. When the temperature rises
above the Cold Temperature Warning Threshold, the Fault flag
will go high but the Cold Warning bits remain set in the diagnos-
tic registers until reset.
Overtemperature Shutdown If the chip temperature rises
above the Overtemperature Shutdown Threshold, T JF , the Fault
flag will go low and the Thermal Shutdown bits will be set in the
diagnostic registers. The A4979 will disable the outputs to try to
prevent a further increase in the chip temperature. When the tem-
perature drops below the Overtemperature Shutdown Threshold,
the Fault flag will go high but the Thermal Shutdown bits remain
set in the diagnostic registers until reset.
Bridge and Output Diagnostics
The A4979 includes monitors that can detect a short to supply or
a short to ground at the motor phase connections. These condi-
tions are detected by monitoring the current from the motor
phase connections through the bridge to the motor supply and to
ground.
Low current comparators and timers are provided to help detect
possible open load conditions.
Short to Supply A short from any of the motor connections to
the motor supply (VBBA or VBBB) is detected by monitoring the
voltage across the low-side current sense resistor in each bridge.
This gives a direct measurement of the current through the low
side of the bridge.
When a low-side FET is in the On state, the voltage across the
sense resistor, under normal operating conditions, should never
be more than the Maximum Sense Voltage, V SMAX . In this state,
an overcurrent is determined to exist when the voltage across the
sense resistor exceeds the Low-Side Overcurrent Sense Voltage,
V OCL , typically 2 × V SMAX . This overcurrent must be continu-
ously present for at least the Overcurrent Fault Delay, t SCT ,
before the short fault is confirmed by setting the relevant bit in
FAULT0 and driving the DIAG output low if the Fault Output
flag is selected. The output is switched off and remains off until a
fault reset occurs.
Note that the sense resistor cannot distinguish which low-side
FET is in an overcurrent state. So, if more than one low-side FET
is active when the fault is detected, for example during low-side
recirculation with synchronous rectification, then the shorted con-
nection is determined from the internal PWM state.
The actual overcurrent that V OCL represents is determined by the
value of the sense resistor and is typically 2 × I SMAX .
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
13
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