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| 型号： | A4979GLPTR-T |
| 厂商： | Allegro Microsystems Inc |
| 文件页数： | 14/44页 |
| 文件大小： | 0K |
| 描述： | IC MOTOR DRVR MICRO STEP 28TSSOP |
| 特色产品： | A4979 Series |
| 标准包装： | 1 |
| 应用： | 直流电机驱动器，PWM 电机驱动器，步进电机驱动器 |
| 评估套件： | 可供 |
| 输出数： | 1 |
| 电流 - 输出： | 1.5A |
| 电压 - 负载： | 7 V ~ 50 V |
| 电源电压： | 3 V ~ 5.5 V |
| 工作温度： | -40°C ~ 105°C |
| 安装类型： | 表面贴装 |
| 封装/外壳： | 28-SOIC（0.173"，4.40mm 宽）裸露焊盘 |
| 供应商设备封装： | 28-TSSOP 裸露焊盘 |
| 包装： | 标准包装 |
| 其它名称： | 620-1463-6 |
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A4979
Microstepping Programmable Stepper Motor Driver
With Stall Detect and Short Circuit Protection
Short to Ground A short from any of the motor connections
to ground is detected by directly monitoring the current through
each of the high-side FETs in each bridge.
When a high-side FET is in the On state the maximum current is
typically always less than 1.5 A. In this state, an overcurrent is
determined to exist when the current through the active high-side
FET exceeds the High-Side Overcurrent Threshold, I OCH .
This overcurrent must be present for at least the Overcurrent
Fault Delay, t SCT , before the short fault is confirmed by setting
the relevant bit in FAULT0 and driving the DIAG output low if
the Fault Output flag is selected. The output is switched off and
remains off until a fault reset occurs.
Note that when a short to ground is present the current through
the high-side FET is limited to the High-Side Current Limit,
I LIMH , during the Overcurrent Fault Delay, t SCT . This prevents
large negative transients at the phase output pins when the out-
puts are switched off.
Shorted Load A short across the load is indicated by concurrent
short faults on both high side and low side.
Short Fault Blanking All overcurrent conditions are ignored
for the duration of the Overcurrent Fault Delay, t SCT . The short
detection delay timer is started when an overcurrent first occurs.
If the overcurrent is still present at the end of the short detection
delay time then a short fault will be generated and latched. If the
overcurrent goes away before the short detection delay time is
complete, then the timer is reset and no fault is generated.
This prevents false short detection caused by supply and load
transients. It also prevents false short detections resulting from
current transients generated by the motor or wiring capacitance
when a FET is first switched on.
Short Fault Reset and Retry When a short circuit has been
detected all outputs for the faulty phase are disabled until the
next occurrence of: the next rising edge on the STEP input, the
RESETn input is pulsed low, or until the diagnostic registers
are reset by writing to one of the registers through the serial
interface. At the next STEP command or after a fault reset, the
Fault Register flag is cleared, the outputs are re-enabled, and the
voltage across the FET is resampled. Note that the diagnostic
registers are not cleared by the rising edge of the STEP input.
While the fault persists the A4979 will continue this cycle,
enabling the outputs for a short period then disabling the out-
puts. This allows the A4979 to handle a continuous short circuit
without damage. If, while stepping rapidly, a short circuit appears
and no action is taken, the repeated short circuit current pulses
will eventually cause the temperature of the A4979 to rise and an
overtemperature fault will occur.
Open Load Detection Open load conditions are detected
by monitoring the phase current when the phase DAC value
is greater than 31. The Open Load Current Threshold, I OL , is
defined by the OL0 and OL1 bits in the Run register as a percent-
age of the maximum (100%) phase current, I PMAX , defined in the
Phase Current table. The 100% level in the Phase Current table is
defined by the sense resistor value and the contents of the MXI0
and MXI1 bits in Configuration Register 0.
For example:
? if R S = 180 m Ω and V REF = 2 V, then I SMAX = 694 mA
? if MXI1 = 1 and MXI0 = 0, then I PMAX = 520 mA
? if OL1=0 and OL0=1, then I OL = 156 mA
The open load current monitor is only active after a blank
time from the start of a PWM cycle. An open load can only be
detected if the DAC value for the phase is greater than 31 and the
current has not exceeded the Open Load Current Threshold for
more than 15 PWM cycles.
The A4979 continues to drive the bridge outputs under an open
load condition and clears the Fault Register flag as soon as the
phase current exceeds the Open Load Current Threshold or the
DAC value is less than 32. The diagnostic registers retain the
open load fault bits, OLA and OLB, and will not be cleared until
RESETn is pulsed low or one of the diagnostic registers is written
through the serial interface.
Stall Detection A PWM monitor feature is included in the
A4979 to assist in determining the stall condition of the stepper
motor. A stalled motor condition is when the phase currents are
being sequenced to step the motor but the motor remains station-
ary. This can be due to a mechanical blockage such as an end stop
or it can be due to the step sequence exceeding the motor capabil-
ity for the attached load. Reliable stall detection in a simple step-
per driver is only possible by combining the PWM monitor with
a continuous step sequence at a sufficiently high step rate.
Allegro MicroSystems, LLC
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
14
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